Searched refs:FPSCR (Results 1 – 8 of 8) sorted by relevance
| /arch/unicore32/kernel/ |
| D | fpu-ucf64.c | 95 cff(FPSCR), inst); in ucf64_exchandler()
111 ctf(FPSCR, tmp); in ucf64_exchandler()
119 ctf(FPSCR, 0x0); /* FPSCR_UFE | FPSCR_NDE perhaps better */ in ucf64_init()
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| D | entry.S | 415 cff r1, s31 @ get fpu FPSCR
423 @ r1 holds the FPSCR value
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| /arch/sh/math-emu/ |
| D | math.c | 27 #define FPSCR (fregs->fpscr) macro
28 #define FPSCR_RM (FPSCR&3)
29 #define FPSCR_DN ((FPSCR>>18)&1)
30 #define FPSCR_PR ((FPSCR>>19)&1)
31 #define FPSCR_SZ ((FPSCR>>20)&1)
32 #define FPSCR_FR ((FPSCR>>21)&1)
341 FPSCR ^= flag; in fxchg()
434 unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR; in id_sys()
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| /arch/unicore32/include/asm/ |
| D | fpu-ucf64.h | 13 #define FPSCR s31 macro
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| /arch/arm/include/asm/ |
| D | vfp.h | 12 #define FPSCR cr1 macro
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| /arch/arm/vfp/ |
| D | vfpmodule.c | 243 fmrx(FPEXC), fmrx(FPSCR), inst); in vfp_panic()
274 fmxr(FPSCR, fpscr); in vfp_raise_exceptions()
354 orig_fpscr = fpscr = fmrx(FPSCR); in VFP_bounce()
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| D | vfphw.S | 117 VFPFMRX r5, FPSCR @ current status
127 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
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| /arch/arm/kvm/ |
| D | interrupts_head.S | 25 VFPFMRX r3, FPSCR
37 stm \vfp_base, {r2-r5} @ Save FPEXC, FPSCR, FPINST, FPINST2
43 ldm \vfp_base, {r2-r5} @ Load FPEXC, FPSCR, FPINST, FPINST2
45 VFPFMXR FPSCR, r3
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