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Searched refs:FR (Results 1 – 6 of 6) sorted by relevance

/arch/frv/include/asm/
Dspinlock.h15 #error no spinlocks for FR-V yet
/arch/sh/math-emu/
Dmath.c36 #define FR ((unsigned long*)(fregs->fp_regs)) macro
37 #define FR0 (FR[BANK(0)])
38 #define FRn (FR[BANK(n)])
39 #define FRm (FR[BANK(m)])
45 #define XFn (FR[BANK(XREG(n))])
46 #define XFm (FR[BANK(XREG(m))])
/arch/mips/kvm/
Dfpu.S25 sll t0, t0, 5 # is Status.FR set?
69 sll t0, t0, 5 # is Status.FR set?
/arch/frv/
DKconfig62 menu "Fujitsu FR-V system setup"
67 This options switches on and off support for the FR-V MMU
68 (effectively switching between vmlinux and uClinux). Not all FR-V
76 Setting this option causes the FR-V atomic operations to be mostly
328 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
/arch/mips/kernel/
Dr4k_fpu.S62 bgez t0, 1f # skip storing odd if FR=0
130 bgez t0, 1f # skip loading odd if FR=0
Dr4k_switch.S207 sll t0, t0, 5 # is Status.FR set?