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Searched refs:GLIU_MSR_REG (Results 1 – 5 of 5) sorted by relevance

/arch/mips/loongson64/common/cs5536/
Dcs5536_acc.c25 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); in pci_acc_write_reg()
30 _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); in pci_acc_write_reg()
50 _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM1), hi, lo); in pci_acc_write_reg()
77 _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo); in pci_acc_read_reg()
81 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); in pci_acc_read_reg()
111 _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo); in pci_acc_read_reg()
Dcs5536_ide.c25 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); in pci_ide_write_reg()
30 _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); in pci_ide_write_reg()
61 _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM2), hi, lo); in pci_ide_write_reg()
114 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); in pci_ide_read_reg()
Dcs5536_ohci.c59 _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM3), hi, lo); in pci_ohci_write_reg()
Dcs5536_ehci.c59 _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM4), hi, lo); in pci_ehci_write_reg()
/arch/mips/include/asm/mach-loongson64/cs5536/
Dcs5536.h30 #define GLIU_MSR_REG(offset) (CS5536_GLIU_MSR_BASE | (offset)) macro