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Searched refs:ICC_SRE_EL1 (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/include/asm/
Darch_gicv3.h29 #define ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5) macro
158 asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val)); in gic_read_sre()
164 asm volatile("msr_s " __stringify(ICC_SRE_EL1) ", %0" : : "r" ((u64)val)); in gic_write_sre()
/arch/arm64/kvm/
Dvgic-v3-switch.S141 msr_s ICC_SRE_EL1, x5
157 msr_s ICC_SRE_EL1, x25