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Searched refs:ICPLB_ADDR5 (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/include/asm/
Dcdef_LPBlackfin.h121 #define bfin_read_ICPLB_ADDR5() bfin_read32(ICPLB_ADDR5)
122 #define bfin_write_ICPLB_ADDR5(val) bfin_write32(ICPLB_ADDR5,val)
Ddpmc.h471 PM_PUSH(9, ICPLB_ADDR5)
559 PM_POP(9, ICPLB_ADDR5)
Ddef_LPBlackfin.h338 #define ICPLB_ADDR5 0xFFE01114 /* Instruction Cacheability macro
/arch/blackfin/kernel/
Ddebug-mmrs.c681 D32(ICPLB_ADDR5); in bfin_debug_mmrs_init()