Searched refs:ICPLB_DATA0 (Results 1 – 7 of 7) sorted by relevance
| /arch/blackfin/mach-common/ |
| D | cache-c.c | 66 bfin_cache_init(icplb_tbl, ICPLB_ADDR0, ICPLB_DATA0, IMEM_CONTROL, in bfin_icache_init()
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| /arch/blackfin/kernel/cplb-mpu/ |
| D | cplbmgr.c | 273 bfin_write32(ICPLB_DATA0 + idx * 4, i_data); in icplb_miss()
327 bfin_write32(ICPLB_DATA0 + i * 4, 0); in flush_switched_cplbs()
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| /arch/blackfin/kernel/cplb-nompu/ |
| D | cplbmgr.c | 57 bfin_write32(ICPLB_DATA0 + idx * 4, data); in write_icplb_data()
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| /arch/blackfin/include/asm/ |
| D | dpmc.h | 378 B0.L = lo(ICPLB_DATA0);
486 PM_PUSH(6, ICPLB_DATA0)
544 PM_POP(6, ICPLB_DATA0)
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| D | cdef_LPBlackfin.h | 143 #define bfin_read_ICPLB_DATA0() bfin_read32(ICPLB_DATA0)
144 #define bfin_write_ICPLB_DATA0(val) bfin_write32(ICPLB_DATA0,val)
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| D | def_LPBlackfin.h | 371 #define ICPLB_DATA0 0xFFE01200 /* Instruction Cache 0 Status */ macro
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| /arch/blackfin/kernel/ |
| D | debug-mmrs.c | 692 D32(ICPLB_DATA0); in bfin_debug_mmrs_init()
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