Searched refs:IMEM_CONTROL (Results 1 – 9 of 9) sorted by relevance
/arch/blackfin/include/asm/ |
D | cplb.h | 128 #define _disable_icplb() _disable_cplb(IMEM_CONTROL, ENICPLB) 129 #define disable_icplb() disable_cplb(IMEM_CONTROL, ENICPLB) 148 #define _enable_icplb() _enable_cplb(IMEM_CONTROL, ENICPLB) 149 #define enable_icplb() enable_cplb(IMEM_CONTROL, ENICPLB)
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D | cdef_LPBlackfin.h | 105 #define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL) 106 #define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL,val)
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D | dpmc.h | 420 PM_CORE_PUSH(1, IMEM_CONTROL); 615 PM_CORE_POP(1, IMEM_CONTROL)
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D | def_LPBlackfin.h | 318 #define IMEM_CONTROL 0xFFE01004 /* Instruction Memory Control */ macro
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/arch/blackfin/mach-bf561/ |
D | secondary.S | 67 r1 = [p5 + (IMEM_CONTROL - COREMMR_BASE)]; 69 [p5 + (IMEM_CONTROL - COREMMR_BASE)] = r1;
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/arch/blackfin/mach-common/ |
D | cache-c.c | 66 bfin_cache_init(icplb_tbl, ICPLB_ADDR0, ICPLB_DATA0, IMEM_CONTROL, in bfin_icache_init()
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D | head.S | 76 r1 = [p5 + (IMEM_CONTROL - COREMMR_BASE)]; 78 [p5 + (IMEM_CONTROL - COREMMR_BASE)] = r1;
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D | entry.S | 367 P4.L = LO(IMEM_CONTROL); 368 P4.H = HI(IMEM_CONTROL); 1194 P4.L = LO(IMEM_CONTROL); 1195 P4.H = HI(IMEM_CONTROL);
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/arch/blackfin/kernel/ |
D | debug-mmrs.c | 710 D32(IMEM_CONTROL); in bfin_debug_mmrs_init()
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