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Searched refs:IO_MASK (Results 1 – 9 of 9) sorted by relevance

/arch/cris/include/uapi/arch-v10/arch/
Dsv_addr_ag.h28 #define IO_MASK(reg, field) IO_MASK_ (reg##_, field##_) macro
121 IO_MASK( R_WAITSTATES , SRAM_WS )
122 IO_MASK( R_TEST , W32 )
129 IO_MASK( R_DRAM_TIMING, REF )
131 IO_MASK( R_EXT_DMA_0_STAT, TFR_COUNT ) >> IO_BITNR( R_EXT_DMA_0_STAT, TFR_COUNT )
133 IO_RD(R_EXT_DMA_0_STAT) & IO_MASK( R_EXT_DMA_0_STAT, S )
Dsvinto.h53 while( (*R_DMA_CH##n##_CMD & IO_MASK( R_DMA_CH0_CMD, cmd )) != \
/arch/cris/arch-v10/kernel/
Ddebugport.c146 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6); in start_port()
151 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8); in start_port()
156 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2); in start_port()
158 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3); in start_port()
164 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4); in start_port()
166 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5); in start_port()
293 while (!(*port->read & IO_MASK(R_SERIAL0_READ, tr_ready))) in console_write_direct()
298 while (!(*port->read & IO_MASK(R_SERIAL0_READ, tr_ready))) in console_write_direct()
343 } while (!(readval & IO_MASK(R_SERIAL0_READ, data_avail))); in getDebugChar()
345 return (readval & IO_MASK(R_SERIAL0_READ, data_in)); in getDebugChar()
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Dirq.c146 mask &= ~(IO_MASK(R_VECT_MASK_RD, timer0)); in do_multiple_IRQ()
155 ethmask = (IO_MASK(R_VECT_MASK_RD, dma0) | in do_multiple_IRQ()
156 IO_MASK(R_VECT_MASK_RD, dma1)); in do_multiple_IRQ()
Dfasttimer.c186 ~IO_MASK(R_TIMER_CTRL, timerdiv1) & in start_timer1()
187 ~IO_MASK(R_TIMER_CTRL, tm1) & in start_timer1()
188 ~IO_MASK(R_TIMER_CTRL, clksel1)) | in start_timer1()
199 (r_timer_ctrl_shadow & ~IO_MASK(R_TIMER_CTRL, tm1)) | in start_timer1()
354 (r_timer_ctrl_shadow & ~IO_MASK(R_TIMER_CTRL, tm1)) | in timer1_handler()
Dhead.S417 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
422 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
/arch/cris/arch-v10/drivers/
Di2c.c85 #define i2c_enable() *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_en))
86 #define i2c_disable() *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_en))
91 *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
94 *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
101 ~IO_MASK(R_PORT_PB_I2C, i2c_clk)) | IO_FIELD(R_PORT_PB_I2C, i2c_clk, (x))); \
106 ~IO_MASK(R_PORT_PB_I2C, i2c_d)) | IO_FIELD(R_PORT_PB_I2C, i2c_d, (x))); \
647 port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir0); in i2c_init()
648 port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir1); in i2c_init()
Dgpio.c421 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g0dir); in setget_input()
426 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g8_15dir); in setget_input()
431 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g16_23dir); in setget_input()
436 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g24dir); in setget_input()
468 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g0dir); in setget_output()
473 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g8_15dir); in setget_output()
478 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g16_23dir); in setget_output()
483 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g24dir); in setget_output()
Dsync_serial.c1398 IO_MASK(R_SYNC_SERIAL1_CTRL, wordsize)) { in manual_interrupt()