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/arch/metag/include/asm/
Dtbx.h43 #define TBID_IS_SEGSTR( Id ) (((Id) & (TBID_SEGTYPE_BITS>>1)) == 0) argument
106 #define TBID_IS_VIRTTHREAD( Id ) ((Id) < 0) argument
109 #define TBID_IS_REALTHREAD( Id ) ((Id) >= 0) argument
630 int Id; member
715 int Id; /* Id of the segment */ member
933 PTBISEG __TBIFindSeg( PTBISEG pStart, int Id );
936 PTBISEG __TBINewSeg( PTBISEG pFromSeg, int Id, unsigned int Bytes );
939 PTBISEG __TBIMakeNewSeg( int Id, unsigned int Bytes );
953 PTBI __TBI( int Id );
974 TBIRES __TBISyncTrigger( TBIRES State, int Id );
[all …]
/arch/m32r/platforms/oaks32r/
Ddot.gdbinit.nommu2 # $Id: dot.gdbinit.oaks32r,v 1.4 2004/10/20 02:24:37 takata Exp $
6 # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
/arch/m32r/platforms/m32700ut/
Ddot.gdbinit_400MHz_32MB2 # $Id: dot.gdbinit_400MHz_32MB,v 1.1 2004/10/21 01:41:27 fujiwara Exp $
6 # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
Ddot.gdbinit_300MHz_32MB2 # $Id: dot.gdbinit_300MHz_32MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
6 # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
Ddot.gdbinit_200MHz_16MB2 # $Id: dot.gdbinit_200MHz_16MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
6 # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
/arch/m32r/platforms/mappi/
Ddot.gdbinit.nommu2 # $Id$
6 # $ Id: gen_gdbinit.pl,v 1.5 2004/01/23 08:23:25 takata Exp $
Ddot.gdbinit2 # $Id: dot.gdbinit.mappi,v 1.4 2004/10/20 02:24:37 takata Exp $
6 # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
Ddot.gdbinit.smp2 # $Id$
/arch/m32r/platforms/mappi3/
Ddot.gdbinit2 # $Id: dot.gdbinit,v 1.1 2005/04/11 02:21:08 sakugawa Exp $
/arch/m32r/platforms/mappi2/
Ddot.gdbinit.vdec22 # $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $
/arch/m32r/platforms/opsput/
Ddot.gdbinit2 # $Id: dot.gdbinit,v 1.1 2004/07/27 06:54:20 sakugawa Exp $
/arch/arm/boot/compressed/
Dhead.S1007 .word 0x000f0000 @ new CPU Id