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Searched refs:M32R_ICUCR_ISMOD10 (Results 1 – 7 of 7) sorted by relevance

/arch/m32r/platforms/mappi2/
Dsetup.c80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
139 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
/arch/m32r/platforms/mappi3/
Dsetup.c79 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
140 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
/arch/m32r/platforms/oaks32r/
Dsetup.c78 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
/arch/m32r/include/asm/
Dm32r_mp_fpga.h263 #define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/ macro
Dm32102.h227 #define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/ macro
/arch/m32r/platforms/m32700ut/
Dsetup.c370 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
/arch/m32r/platforms/opsput/
Dsetup.c369 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()