1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 38 #define EX_R9 0 39 #define EX_R10 8 40 #define EX_R11 16 41 #define EX_R12 24 42 #define EX_R13 32 43 #define EX_SRR0 40 44 #define EX_DAR 48 45 #define EX_DSISR 56 46 #define EX_CCR 60 47 #define EX_R3 64 48 #define EX_LR 72 49 #define EX_CFAR 80 50 #define EX_PPR 88 /* SMT thread status register (priority) */ 51 #define EX_CTR 96 52 53 #define STF_ENTRY_BARRIER_SLOT \ 54 STF_ENTRY_BARRIER_FIXUP_SECTION; \ 55 nop; \ 56 nop; \ 57 nop 58 59 #define STF_EXIT_BARRIER_SLOT \ 60 STF_EXIT_BARRIER_FIXUP_SECTION; \ 61 nop; \ 62 nop; \ 63 nop; \ 64 nop; \ 65 nop; \ 66 nop 67 68 #define ENTRY_FLUSH_SLOT \ 69 ENTRY_FLUSH_FIXUP_SECTION; \ 70 nop; \ 71 nop; \ 72 nop; 73 74 /* 75 * r10 must be free to use, r13 must be paca 76 */ 77 #define INTERRUPT_TO_KERNEL \ 78 STF_ENTRY_BARRIER_SLOT; \ 79 ENTRY_FLUSH_SLOT 80 81 /* 82 * Macros for annotating the expected destination of (h)rfid 83 * 84 * The nop instructions allow us to insert one or more instructions to flush the 85 * L1-D cache when returning to userspace or a guest. 86 */ 87 #define RFI_FLUSH_SLOT \ 88 RFI_FLUSH_FIXUP_SECTION; \ 89 nop; \ 90 nop; \ 91 nop 92 93 #define RFI_TO_KERNEL \ 94 rfid 95 96 #define RFI_TO_USER \ 97 STF_EXIT_BARRIER_SLOT; \ 98 RFI_FLUSH_SLOT; \ 99 rfid; \ 100 b rfi_flush_fallback 101 102 #define RFI_TO_USER_OR_KERNEL \ 103 STF_EXIT_BARRIER_SLOT; \ 104 RFI_FLUSH_SLOT; \ 105 rfid; \ 106 b rfi_flush_fallback 107 108 #define RFI_TO_GUEST \ 109 STF_EXIT_BARRIER_SLOT; \ 110 RFI_FLUSH_SLOT; \ 111 rfid; \ 112 b rfi_flush_fallback 113 114 #define HRFI_TO_KERNEL \ 115 hrfid 116 117 #define HRFI_TO_USER \ 118 STF_EXIT_BARRIER_SLOT; \ 119 RFI_FLUSH_SLOT; \ 120 hrfid; \ 121 b hrfi_flush_fallback 122 123 #define HRFI_TO_USER_OR_KERNEL \ 124 STF_EXIT_BARRIER_SLOT; \ 125 RFI_FLUSH_SLOT; \ 126 hrfid; \ 127 b hrfi_flush_fallback 128 129 #define HRFI_TO_GUEST \ 130 STF_EXIT_BARRIER_SLOT; \ 131 RFI_FLUSH_SLOT; \ 132 hrfid; \ 133 b hrfi_flush_fallback 134 135 #define HRFI_TO_UNKNOWN \ 136 STF_EXIT_BARRIER_SLOT; \ 137 RFI_FLUSH_SLOT; \ 138 hrfid; \ 139 b hrfi_flush_fallback 140 141 #ifdef CONFIG_RELOCATABLE 142 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 143 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 144 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 145 LOAD_HANDLER(r12,label); \ 146 mtctr r12; \ 147 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 148 li r10,MSR_RI; \ 149 mtmsrd r10,1; /* Set RI (EE=0) */ \ 150 bctr; 151 #else 152 /* If not relocatable, we can jump directly -- and save messing with LR */ 153 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 154 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 155 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 156 li r10,MSR_RI; \ 157 mtmsrd r10,1; /* Set RI (EE=0) */ \ 158 b label; 159 #endif 160 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 161 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 162 163 /* 164 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 165 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 166 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 167 */ 168 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 169 EXCEPTION_PROLOG_0(area); \ 170 EXCEPTION_PROLOG_1(area, extra, vec); \ 171 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 172 173 /* 174 * We're short on space and time in the exception prolog, so we can't 175 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the 176 * low halfword of the address, but for Kdump we need the whole low 177 * word. 178 */ 179 #define LOAD_HANDLER(reg, label) \ 180 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \ 181 ori reg,reg,(label)-_stext; /* virt addr of handler ... */ 182 183 /* Exception register prefixes */ 184 #define EXC_HV H 185 #define EXC_STD 186 187 #if defined(CONFIG_RELOCATABLE) 188 /* 189 * If we support interrupts with relocation on AND we're a relocatable kernel, 190 * we need to use CTR to get to the 2nd level handler. So, save/restore it 191 * when required. 192 */ 193 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 194 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 195 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 196 #else 197 /* ...else CTR is unused and in register. */ 198 #define SAVE_CTR(reg, area) 199 #define GET_CTR(reg, area) mfctr reg 200 #define RESTORE_CTR(reg, area) 201 #endif 202 203 /* 204 * PPR save/restore macros used in exceptions_64s.S 205 * Used for P7 or later processors 206 */ 207 #define SAVE_PPR(area, ra, rb) \ 208 BEGIN_FTR_SECTION_NESTED(940) \ 209 ld ra,PACACURRENT(r13); \ 210 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 211 std rb,TASKTHREADPPR(ra); \ 212 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 213 214 #define RESTORE_PPR_PACA(area, ra) \ 215 BEGIN_FTR_SECTION_NESTED(941) \ 216 ld ra,area+EX_PPR(r13); \ 217 mtspr SPRN_PPR,ra; \ 218 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 219 220 /* 221 * Increase the priority on systems where PPR save/restore is not 222 * implemented/ supported. 223 */ 224 #define HMT_MEDIUM_PPR_DISCARD \ 225 BEGIN_FTR_SECTION_NESTED(942) \ 226 HMT_MEDIUM; \ 227 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/ 228 229 /* 230 * Get an SPR into a register if the CPU has the given feature 231 */ 232 #define OPT_GET_SPR(ra, spr, ftr) \ 233 BEGIN_FTR_SECTION_NESTED(943) \ 234 mfspr ra,spr; \ 235 END_FTR_SECTION_NESTED(ftr,ftr,943) 236 237 /* 238 * Set an SPR from a register if the CPU has the given feature 239 */ 240 #define OPT_SET_SPR(ra, spr, ftr) \ 241 BEGIN_FTR_SECTION_NESTED(943) \ 242 mtspr spr,ra; \ 243 END_FTR_SECTION_NESTED(ftr,ftr,943) 244 245 /* 246 * Save a register to the PACA if the CPU has the given feature 247 */ 248 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 249 BEGIN_FTR_SECTION_NESTED(943) \ 250 std ra,offset(r13); \ 251 END_FTR_SECTION_NESTED(ftr,ftr,943) 252 253 #define EXCEPTION_PROLOG_0(area) \ 254 GET_PACA(r13); \ 255 std r9,area+EX_R9(r13); /* save r9 */ \ 256 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 257 HMT_MEDIUM; \ 258 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 259 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 260 261 #define __EXCEPTION_PROLOG_1(area, extra, vec) \ 262 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 263 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 264 INTERRUPT_TO_KERNEL; \ 265 SAVE_CTR(r10, area); \ 266 mfcr r9; \ 267 extra(vec); \ 268 std r11,area+EX_R11(r13); \ 269 std r12,area+EX_R12(r13); \ 270 GET_SCRATCH0(r10); \ 271 std r10,area+EX_R13(r13) 272 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 273 __EXCEPTION_PROLOG_1(area, extra, vec) 274 275 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 276 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 277 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 278 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 279 LOAD_HANDLER(r12,label) \ 280 mtspr SPRN_##h##SRR0,r12; \ 281 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 282 mtspr SPRN_##h##SRR1,r10; \ 283 h##RFI_TO_KERNEL; \ 284 b . /* prevent speculative execution */ 285 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 286 __EXCEPTION_PROLOG_PSERIES_1(label, h) 287 288 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 289 EXCEPTION_PROLOG_0(area); \ 290 EXCEPTION_PROLOG_1(area, extra, vec); \ 291 EXCEPTION_PROLOG_PSERIES_1(label, h); 292 293 #define __KVMTEST(n) \ 294 lbz r10,HSTATE_IN_GUEST(r13); \ 295 cmpwi r10,0; \ 296 bne do_kvm_##n 297 298 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 299 /* 300 * If hv is possible, interrupts come into to the hv version 301 * of the kvmppc_interrupt code, which then jumps to the PR handler, 302 * kvmppc_interrupt_pr, if the guest is a PR guest. 303 */ 304 #define kvmppc_interrupt kvmppc_interrupt_hv 305 #else 306 #define kvmppc_interrupt kvmppc_interrupt_pr 307 #endif 308 309 #define __KVM_HANDLER(area, h, n) \ 310 do_kvm_##n: \ 311 BEGIN_FTR_SECTION_NESTED(947) \ 312 ld r10,area+EX_CFAR(r13); \ 313 std r10,HSTATE_CFAR(r13); \ 314 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 315 BEGIN_FTR_SECTION_NESTED(948) \ 316 ld r10,area+EX_PPR(r13); \ 317 std r10,HSTATE_PPR(r13); \ 318 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 319 ld r10,area+EX_R10(r13); \ 320 stw r9,HSTATE_SCRATCH1(r13); \ 321 ld r9,area+EX_R9(r13); \ 322 std r12,HSTATE_SCRATCH0(r13); \ 323 li r12,n; \ 324 b kvmppc_interrupt 325 326 #define __KVM_HANDLER_SKIP(area, h, n) \ 327 do_kvm_##n: \ 328 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 329 ld r10,area+EX_R10(r13); \ 330 beq 89f; \ 331 stw r9,HSTATE_SCRATCH1(r13); \ 332 BEGIN_FTR_SECTION_NESTED(948) \ 333 ld r9,area+EX_PPR(r13); \ 334 std r9,HSTATE_PPR(r13); \ 335 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 336 ld r9,area+EX_R9(r13); \ 337 std r12,HSTATE_SCRATCH0(r13); \ 338 li r12,n; \ 339 b kvmppc_interrupt; \ 340 89: mtocrf 0x80,r9; \ 341 ld r9,area+EX_R9(r13); \ 342 b kvmppc_skip_##h##interrupt 343 344 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 345 #define KVMTEST(n) __KVMTEST(n) 346 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 347 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 348 349 #else 350 #define KVMTEST(n) 351 #define KVM_HANDLER(area, h, n) 352 #define KVM_HANDLER_SKIP(area, h, n) 353 #endif 354 355 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 356 #define KVMTEST_PR(n) __KVMTEST(n) 357 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n) 358 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 359 360 #else 361 #define KVMTEST_PR(n) 362 #define KVM_HANDLER_PR(area, h, n) 363 #define KVM_HANDLER_PR_SKIP(area, h, n) 364 #endif 365 366 #define NOTEST(n) 367 368 /* 369 * The common exception prolog is used for all except a few exceptions 370 * such as a segment miss on a kernel address. We have to be prepared 371 * to take another exception from the point where we first touch the 372 * kernel stack onwards. 373 * 374 * On entry r13 points to the paca, r9-r13 are saved in the paca, 375 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 376 * SRR1, and relocation is on. 377 */ 378 #define EXCEPTION_PROLOG_COMMON(n, area) \ 379 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 380 mr r10,r1; /* Save r1 */ \ 381 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 382 beq- 1f; \ 383 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 384 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 385 blt+ cr1,3f; /* abort if it is */ \ 386 li r1,(n); /* will be reloaded later */ \ 387 sth r1,PACA_TRAP_SAVE(r13); \ 388 std r3,area+EX_R3(r13); \ 389 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 390 RESTORE_CTR(r1, area); \ 391 b bad_stack; \ 392 3: std r9,_CCR(r1); /* save CR in stackframe */ \ 393 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 394 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 395 std r10,0(r1); /* make stack chain pointer */ \ 396 std r0,GPR0(r1); /* save r0 in stackframe */ \ 397 std r10,GPR1(r1); /* save r1 in stackframe */ \ 398 beq 4f; /* if from kernel mode */ \ 399 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 400 SAVE_PPR(area, r9, r10); \ 401 4: EXCEPTION_PROLOG_COMMON_2(area) \ 402 EXCEPTION_PROLOG_COMMON_3(n) \ 403 ACCOUNT_STOLEN_TIME 404 405 /* Save original regs values from save area to stack frame. */ 406 #define EXCEPTION_PROLOG_COMMON_2(area) \ 407 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 408 ld r10,area+EX_R10(r13); \ 409 std r9,GPR9(r1); \ 410 std r10,GPR10(r1); \ 411 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 412 ld r10,area+EX_R12(r13); \ 413 ld r11,area+EX_R13(r13); \ 414 std r9,GPR11(r1); \ 415 std r10,GPR12(r1); \ 416 std r11,GPR13(r1); \ 417 BEGIN_FTR_SECTION_NESTED(66); \ 418 ld r10,area+EX_CFAR(r13); \ 419 std r10,ORIG_GPR3(r1); \ 420 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 421 GET_CTR(r10, area); \ 422 std r10,_CTR(r1); 423 424 #define EXCEPTION_PROLOG_COMMON_3(n) \ 425 std r2,GPR2(r1); /* save r2 in stackframe */ \ 426 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 427 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 428 mflr r9; /* Get LR, later save to stack */ \ 429 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 430 std r9,_LINK(r1); \ 431 lbz r10,PACASOFTIRQEN(r13); \ 432 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 433 std r10,SOFTE(r1); \ 434 std r11,_XER(r1); \ 435 li r9,(n)+1; \ 436 std r9,_TRAP(r1); /* set trap number */ \ 437 li r10,0; \ 438 ld r11,exception_marker@toc(r2); \ 439 std r10,RESULT(r1); /* clear regs->result */ \ 440 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 441 442 /* 443 * Exception vectors. 444 */ 445 #define STD_EXCEPTION_PSERIES(loc, vec, label) \ 446 . = loc; \ 447 .globl label##_pSeries; \ 448 label##_pSeries: \ 449 HMT_MEDIUM_PPR_DISCARD; \ 450 SET_SCRATCH0(r13); /* save r13 */ \ 451 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 452 EXC_STD, KVMTEST_PR, vec) 453 454 /* Version of above for when we have to branch out-of-line */ 455 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 456 .globl label##_pSeries; \ 457 label##_pSeries: \ 458 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 459 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD) 460 461 #define STD_EXCEPTION_HV(loc, vec, label) \ 462 . = loc; \ 463 .globl label##_hv; \ 464 label##_hv: \ 465 HMT_MEDIUM_PPR_DISCARD; \ 466 SET_SCRATCH0(r13); /* save r13 */ \ 467 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 468 EXC_HV, KVMTEST, vec) 469 470 /* Version of above for when we have to branch out-of-line */ 471 #define STD_EXCEPTION_HV_OOL(vec, label) \ 472 .globl label##_hv; \ 473 label##_hv: \ 474 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \ 475 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV) 476 477 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 478 . = loc; \ 479 .globl label##_relon_pSeries; \ 480 label##_relon_pSeries: \ 481 HMT_MEDIUM_PPR_DISCARD; \ 482 /* No guest interrupts come through here */ \ 483 SET_SCRATCH0(r13); /* save r13 */ \ 484 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 485 EXC_STD, NOTEST, vec) 486 487 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 488 .globl label##_relon_pSeries; \ 489 label##_relon_pSeries: \ 490 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 491 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD) 492 493 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 494 . = loc; \ 495 .globl label##_relon_hv; \ 496 label##_relon_hv: \ 497 HMT_MEDIUM_PPR_DISCARD; \ 498 /* No guest interrupts come through here */ \ 499 SET_SCRATCH0(r13); /* save r13 */ \ 500 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 501 EXC_HV, NOTEST, vec) 502 503 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 504 .globl label##_relon_hv; \ 505 label##_relon_hv: \ 506 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 507 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV) 508 509 /* This associate vector numbers with bits in paca->irq_happened */ 510 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 511 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE 512 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 513 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 514 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 515 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 516 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL 517 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 518 #define SOFTEN_VALUE_0xe62 PACA_IRQ_HMI 519 520 #define __SOFTEN_TEST(h, vec) \ 521 lbz r10,PACASOFTIRQEN(r13); \ 522 cmpwi r10,0; \ 523 li r10,SOFTEN_VALUE_##vec; \ 524 beq masked_##h##interrupt 525 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec) 526 527 #define SOFTEN_TEST_PR(vec) \ 528 KVMTEST_PR(vec); \ 529 _SOFTEN_TEST(EXC_STD, vec) 530 531 #define SOFTEN_TEST_HV(vec) \ 532 KVMTEST(vec); \ 533 _SOFTEN_TEST(EXC_HV, vec) 534 535 #define SOFTEN_TEST_HV_201(vec) \ 536 KVMTEST(vec); \ 537 _SOFTEN_TEST(EXC_STD, vec) 538 539 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec) 540 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 541 542 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 543 SET_SCRATCH0(r13); /* save r13 */ \ 544 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 545 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 546 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 547 548 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 549 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 550 551 #define MASKABLE_EXCEPTION_OOL(vec, label) \ 552 .globl label##_ool; \ 553 label##_ool: \ 554 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \ 555 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD); 556 557 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \ 558 . = loc; \ 559 .globl label##_pSeries; \ 560 label##_pSeries: \ 561 HMT_MEDIUM_PPR_DISCARD; \ 562 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 563 EXC_STD, SOFTEN_TEST_PR) 564 565 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \ 566 . = loc; \ 567 .globl label##_hv; \ 568 label##_hv: \ 569 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 570 EXC_HV, SOFTEN_TEST_HV) 571 572 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \ 573 .globl label##_hv; \ 574 label##_hv: \ 575 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ 576 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); 577 578 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 579 HMT_MEDIUM_PPR_DISCARD; \ 580 SET_SCRATCH0(r13); /* save r13 */ \ 581 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 582 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 583 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h); 584 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 585 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) 586 587 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 588 . = loc; \ 589 .globl label##_relon_pSeries; \ 590 label##_relon_pSeries: \ 591 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 592 EXC_STD, SOFTEN_NOTEST_PR) 593 594 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \ 595 . = loc; \ 596 .globl label##_relon_hv; \ 597 label##_relon_hv: \ 598 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 599 EXC_HV, SOFTEN_NOTEST_HV) 600 601 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \ 602 .globl label##_relon_hv; \ 603 label##_relon_hv: \ 604 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \ 605 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); 606 607 #define MASKABLE_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 608 .globl label##_relon_pSeries; \ 609 label##_relon_pSeries: \ 610 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec); \ 611 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD) 612 613 /* 614 * Our exception common code can be passed various "additions" 615 * to specify the behaviour of interrupts, whether to kick the 616 * runlatch, etc... 617 */ 618 619 /* 620 * This addition reconciles our actual IRQ state with the various software 621 * flags that track it. This may call C code. 622 */ 623 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 624 625 #define ADD_NVGPRS \ 626 bl save_nvgprs 627 628 #define RUNLATCH_ON \ 629 BEGIN_FTR_SECTION \ 630 CURRENT_THREAD_INFO(r3, r1); \ 631 ld r4,TI_LOCAL_FLAGS(r3); \ 632 andi. r0,r4,_TLF_RUNLATCH; \ 633 beql ppc64_runlatch_on_trampoline; \ 634 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 635 636 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \ 637 .align 7; \ 638 .globl label##_common; \ 639 label##_common: \ 640 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ 641 /* Volatile regs are potentially clobbered here */ \ 642 additions; \ 643 addi r3,r1,STACK_FRAME_OVERHEAD; \ 644 bl hdlr; \ 645 b ret 646 647 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 648 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \ 649 ADD_NVGPRS;ADD_RECONCILE) 650 651 /* 652 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 653 * in the idle task and therefore need the special idle handling 654 * (finish nap and runlatch) 655 */ 656 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 657 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \ 658 FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 659 660 /* 661 * When the idle code in power4_idle puts the CPU into NAP mode, 662 * it has to do so in a loop, and relies on the external interrupt 663 * and decrementer interrupt entry code to get it out of the loop. 664 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 665 * to signal that it is in the loop and needs help to get out. 666 */ 667 #ifdef CONFIG_PPC_970_NAP 668 #define FINISH_NAP \ 669 BEGIN_FTR_SECTION \ 670 CURRENT_THREAD_INFO(r11, r1); \ 671 ld r9,TI_LOCAL_FLAGS(r11); \ 672 andi. r10,r9,_TLF_NAPPING; \ 673 bnel power4_fixup_nap; \ 674 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 675 #else 676 #define FINISH_NAP 677 #endif 678 679 #endif /* _ASM_POWERPC_EXCEPTION_H */ 680