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Searched refs:MCFSIM_ICR_LEVEL5 (Results 1 – 2 of 2) sorted by relevance

/arch/m68k/include/asm/
Dmcfintc.h36 #define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */ macro
/arch/m68k/coldfire/
Dm525x.c66 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m525x_i2c_init()