MCFSIM_ICR_PRI0 (reference) in projects: arch

Searched refs:MCFSIM_ICR_PRI0 (Results 1 – 3 of 3) sorted by relevance

/arch/m68k/coldfire/
D	m525x.c	`54 writeb(MCFSIM_ICR_AUTOVEC \| MCFSIM_ICR_LEVEL4 \| MCFSIM_ICR_PRI0, in m525x_qspi_init() 66 writeb(MCFSIM_ICR_AUTOVEC \| MCFSIM_ICR_LEVEL5 \| MCFSIM_ICR_PRI0, in m525x_i2c_init()`
D	m5249.c	`80 writeb(MCFSIM_ICR_AUTOVEC \| MCFSIM_ICR_LEVEL4 \| MCFSIM_ICR_PRI0, in m5249_qspi_init()`
/arch/m68k/include/asm/
D	mcfintc.h	`40 #define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */ macro`