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Searched refs:MDMA_D3_CONFIG (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h736 #define MDMA_D3_CONFIG 0xFFC00F88 /*MemDMA2 Stream 1 Destination Configuration register */ macro
DcdefBF561.h892 #define bfin_read_MDMA_D3_CONFIG() bfin_read16(MDMA_D3_CONFIG)
893 #define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h636 #define MDMA_D3_CONFIG 0xFFC01F88 /* MemDMA1 Stream 1 Destination Configuration Register */ macro
DcdefBF538.h1170 #define bfin_read_MDMA_D3_CONFIG() bfin_read16(MDMA_D3_CONFIG)
1171 #define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h920 #define MDMA_D3_CONFIG 0xffc01f88 /* Memory DMA Stream 3 Destination Configura… macro
DcdefBF54x_base.h1570 #define bfin_read_MDMA_D3_CONFIG() bfin_read16(MDMA_D3_CONFIG)
1571 #define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG, val)