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Searched refs:MIPS_CPU_VEIC (Results 1 – 4 of 4) sorted by relevance

/arch/mips/mti-sead3/
Dsead3-int.c36 (current_cpu_data.options & MIPS_CPU_VEIC) ? "on" : "off"); in arch_init_irq()
/arch/mips/include/asm/
Dcpu.h371 #define MIPS_CPU_VEIC 0x00100000ull /* CPU supports MIPSR2 external interrupt controller mode */ macro
Dcpu-features.h372 # define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC)
/arch/mips/kernel/
Dcpu-probe.c687 c->options |= MIPS_CPU_VEIC; in decode_config3()