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Searched refs:MSTP000 (Results 1 – 2 of 2) sorted by relevance

/arch/sh/kernel/cpu/sh4a/
Dclock-sh7757.c82 enum { MSTP004, MSTP000, MSTP127, MSTP114, MSTP113, MSTP112, enumerator
89 [MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),
117 CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),
118 CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),
119 CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),
120 CLKDEV_CON_ID("riic3", &mstp_clks[MSTP000]),
121 CLKDEV_CON_ID("riic4", &mstp_clks[MSTP000]),
122 CLKDEV_CON_ID("riic5", &mstp_clks[MSTP000]),
123 CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]),
124 CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]),
Dclock-shx3.c81 MSTP001, MSTP000, MSTP119, MSTP105, enumerator
95 [MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),
125 CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),