1 /*
2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5 /*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #ifndef __ASM_ARCH_MXC_COMMON_H__
12 #define __ASM_ARCH_MXC_COMMON_H__
13
14 #include <linux/reboot.h>
15
16 struct irq_data;
17 struct platform_device;
18 struct pt_regs;
19 struct clk;
20 struct device_node;
21 enum mxc_cpu_pwr_mode;
22 struct of_device_id;
23
24 void mx1_map_io(void);
25 void mx21_map_io(void);
26 void mx27_map_io(void);
27 void mx31_map_io(void);
28 void mx35_map_io(void);
29 void imx1_init_early(void);
30 void imx21_init_early(void);
31 void imx27_init_early(void);
32 void imx31_init_early(void);
33 void imx35_init_early(void);
34 void mxc_init_irq(void __iomem *);
35 void tzic_init_irq(void);
36 void mx1_init_irq(void);
37 void mx21_init_irq(void);
38 void mx27_init_irq(void);
39 void mx31_init_irq(void);
40 void mx35_init_irq(void);
41 void imx1_soc_init(void);
42 void imx21_soc_init(void);
43 void imx27_soc_init(void);
44 void imx31_soc_init(void);
45 void imx35_soc_init(void);
46 void epit_timer_init(void __iomem *base, int irq);
47 int mx1_clocks_init(unsigned long fref);
48 int mx21_clocks_init(unsigned long lref, unsigned long fref);
49 int mx27_clocks_init(unsigned long fref);
50 int mx31_clocks_init(unsigned long fref);
51 int mx35_clocks_init(void);
52 int mx31_clocks_init_dt(void);
53 struct platform_device *mxc_register_gpio(char *name, int id,
54 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
55 void mxc_set_cpu_type(unsigned int type);
56 void mxc_restart(enum reboot_mode, const char *);
57 void mxc_arch_reset_init(void __iomem *);
58 void imx_set_aips(void __iomem *);
59 void imx_aips_allow_unprivileged_access(const char *compat);
60 int mxc_device_init(void);
61 void imx_set_soc_revision(unsigned int rev);
62 void imx_init_revision_from_anatop(void);
63 struct device *imx_soc_device_init(void);
64 void imx6_enable_rbc(bool enable);
65 void imx_gpc_check_dt(void);
66 void imx_gpc_set_arm_power_in_lpm(bool power_off);
67 void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
68 void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
69
70 enum mxc_cpu_pwr_mode {
71 WAIT_CLOCKED, /* wfi only */
72 WAIT_UNCLOCKED, /* WAIT */
73 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
74 STOP_POWER_ON, /* just STOP */
75 STOP_POWER_OFF, /* STOP + SRPG */
76 };
77
78 enum mx3_cpu_pwr_mode {
79 MX3_RUN,
80 MX3_WAIT,
81 MX3_DOZE,
82 MX3_SLEEP,
83 };
84
85 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
86
87 void imx_enable_cpu(int cpu, bool enable);
88 void imx_set_cpu_jump(int cpu, void *jump_addr);
89 u32 imx_get_cpu_arg(int cpu);
90 void imx_set_cpu_arg(int cpu, u32 arg);
91 #ifdef CONFIG_SMP
92 void v7_secondary_startup(void);
93 void imx_scu_map_io(void);
94 void imx_smp_prepare(void);
95 #else
imx_scu_map_io(void)96 static inline void imx_scu_map_io(void) {}
imx_smp_prepare(void)97 static inline void imx_smp_prepare(void) {}
98 #endif
99 void imx_src_init(void);
100 void imx_gpc_pre_suspend(bool arm_power_off);
101 void imx_gpc_post_resume(void);
102 void imx_gpc_mask_all(void);
103 void imx_gpc_restore_all(void);
104 void imx_gpc_hwirq_mask(unsigned int hwirq);
105 void imx_gpc_hwirq_unmask(unsigned int hwirq);
106 void imx_anatop_init(void);
107 void imx_anatop_pre_suspend(void);
108 void imx_anatop_post_resume(void);
109 int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
110 void imx6q_set_int_mem_clk_lpm(bool enable);
111 void imx6sl_set_wait_clk(bool enter);
112 int imx_mmdc_get_ddr_type(void);
113
114 void imx_cpu_die(unsigned int cpu);
115 int imx_cpu_kill(unsigned int cpu);
116
117 #ifdef CONFIG_SUSPEND
118 void imx53_suspend(void __iomem *ocram_vbase);
119 extern const u32 imx53_suspend_sz;
120 void imx6_suspend(void __iomem *ocram_vbase);
121 #else
imx53_suspend(void __iomem * ocram_vbase)122 static inline void imx53_suspend(void __iomem *ocram_vbase) {}
123 static const u32 imx53_suspend_sz;
imx6_suspend(void __iomem * ocram_vbase)124 static inline void imx6_suspend(void __iomem *ocram_vbase) {}
125 #endif
126
127 void v7_cpu_resume(void);
128
129 void imx6_pm_ccm_init(const char *ccm_compat);
130 void imx6q_pm_init(void);
131 void imx6dl_pm_init(void);
132 void imx6sl_pm_init(void);
133 void imx6sx_pm_init(void);
134 void imx6ul_pm_init(void);
135
136 #ifdef CONFIG_PM
137 void imx51_pm_init(void);
138 void imx53_pm_init(void);
139 #else
imx51_pm_init(void)140 static inline void imx51_pm_init(void) {}
imx53_pm_init(void)141 static inline void imx53_pm_init(void) {}
142 #endif
143
144 #ifdef CONFIG_NEON
145 int mx51_neon_fixup(void);
146 #else
mx51_neon_fixup(void)147 static inline int mx51_neon_fixup(void) { return 0; }
148 #endif
149
150 #ifdef CONFIG_CACHE_L2X0
151 void imx_init_l2cache(void);
152 #else
imx_init_l2cache(void)153 static inline void imx_init_l2cache(void) {}
154 #endif
155
156 extern struct smp_operations imx_smp_ops;
157 extern struct smp_operations ls1021a_smp_ops;
158
159 #endif
160