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Searched refs:MXVR_DMA5_CONFIG (Results 1 – 5 of 5) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF549.h104 #define MXVR_DMA5_CONFIG 0xffc027fc /* MXVR Sync Data DMA5 Config Register */ macro
DcdefBF549.h166 #define bfin_read_MXVR_DMA5_CONFIG() bfin_read32(MXVR_DMA5_CONFIG)
167 #define bfin_write_MXVR_DMA5_CONFIG(val) bfin_write32(MXVR_DMA5_CONFIG, val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h91 #define MXVR_DMA5_CONFIG 0xFFC027FC /* MXVR Sync Data DMA5 Config Register */ macro
DcdefBF539.h139 #define bfin_read_MXVR_DMA5_CONFIG() bfin_read32(MXVR_DMA5_CONFIG)
140 #define bfin_write_MXVR_DMA5_CONFIG(val) bfin_write32(MXVR_DMA5_CONFIG, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c1199 D32(MXVR_DMA5_CONFIG); in bfin_debug_mmrs_init()