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Searched refs:MXVR_PLL_CTL_1 (Results 1 – 3 of 3) sorted by relevance

/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h148 #define MXVR_PLL_CTL_1 0xFFC028BC /* MXVR Phase Lock Loop Control Register 1 */ macro
DcdefBF539.h235 #define bfin_read_MXVR_PLL_CTL_1() bfin_read32(MXVR_PLL_CTL_1)
236 #define bfin_write_MXVR_PLL_CTL_1(val) bfin_write32(MXVR_PLL_CTL_1, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c1247 # ifdef MXVR_PLL_CTL_1 in bfin_debug_mmrs_init()
1248 D32(MXVR_PLL_CTL_1); in bfin_debug_mmrs_init()