/arch/arm64/kvm/ |
D | sys_regs.c | 444 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b100), \ 447 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b101), \ 450 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b110), \ 453 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b111), \ 477 { Op0(0b01), Op1(0b000), CRn(0b0111), CRm(0b0110), Op2(0b010), 480 { Op0(0b01), Op1(0b000), CRn(0b0111), CRm(0b1010), Op2(0b010), 483 { Op0(0b01), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b010), 489 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm(0b0010), Op2(0b000), 492 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm(0b0010), Op2(0b010), 510 { Op0(0b10), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b000), [all …]
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D | sys_regs.h | 27 u8 Op1; member 40 u8 Op1; member 70 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_instr() 130 if (i1->Op1 != i2->Op1) in cmp_sys_reg() 131 return i1->Op1 - i2->Op1; in cmp_sys_reg() 141 #define Op1(_x) .Op1 = _x macro
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D | sys_regs_generic_v8.c | 58 { Op0(0b11), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), 64 { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
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/arch/arm/kvm/ |
D | coproc.c | 271 { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32, 275 { CRn( 0), CRm( 0), Op1( 2), Op2( 0), is32, 279 { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32, 283 { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32, 287 { CRm64( 2), Op1( 0), is64, access_vm_reg, reset_unknown64, c2_TTBR0 }, 288 { CRn(2), CRm( 0), Op1( 0), Op2( 0), is32, 290 { CRn(2), CRm( 0), Op1( 0), Op2( 1), is32, 292 { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32, 294 { CRm64( 2), Op1( 1), is64, access_vm_reg, reset_unknown64, c2_TTBR1 }, 298 { CRn( 3), CRm( 0), Op1( 0), Op2( 0), is32, [all …]
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D | coproc.h | 25 unsigned long Op1; member 37 unsigned long Op1; member 62 p->CRn, p->Op1, p->is_write ? "write" : "read"); in print_cp_instr() 66 p->CRn, p->CRm, p->Op1, p->Op2, in print_cp_instr() 140 if (i1->Op1 != i2->Op1) in cmp_reg() 141 return i1->Op1 - i2->Op1; in cmp_reg() 151 #define Op1(_x) .Op1 = _x macro
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D | trace.h | 138 TP_PROTO(unsigned long Op1, unsigned long Rt1, unsigned long CRn, 140 TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write), 143 __field( unsigned int, Op1 ) 153 __entry->Op1 = Op1; 162 __entry->Op1, __entry->Rt1, __entry->CRn,
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D | coproc_a15.c | 36 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
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D | coproc_a7.c | 39 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
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/arch/arm/include/asm/ |
D | cp15.h | 52 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument 53 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32 54 #define __ACCESS_CP15_64(Op1, CRm) \ argument 55 "mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
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