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Searched refs:PAGE_SIZE_4MB (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/kernel/cplb-nompu/
Dcplbinit.c57 cplb_pageflags = PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
80 d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
82 i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
90 d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
93 i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
99 d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
102 i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
Dcplbmgr.c131 i_data |= PAGE_SIZE_4MB; in icplb_miss()
178 cplb_pageflags = PAGE_SIZE_4MB; in dcplb_miss()
194 cplb_pageflags = PAGE_SIZE_4MB; in dcplb_miss()
/arch/blackfin/kernel/cplb-mpu/
Dcplbinit.c53 d_data = d_cache | CPLB_SUPV_WR | CPLB_VALID | PAGE_SIZE_4MB | CPLB_DIRTY; in generate_cplb_tables_cpu()
54 i_data = i_cache | CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
75 dcplb_tbl[cpu][i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
79 icplb_tbl[cpu][i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
/arch/blackfin/include/asm/
Ddef_LPBlackfin.h625 #define PAGE_SIZE_4MB 0x00030000 /* 4 MB page size */ macro