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1 /*
2  *  linux/arch/arm/mach-clps711x/p720t.c
3  *
4  *  Copyright (C) 2000-2001 Deep Blue Solutions Ltd
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/types.h>
23 #include <linux/string.h>
24 #include <linux/mm.h>
25 #include <linux/io.h>
26 #include <linux/gpio.h>
27 #include <linux/slab.h>
28 #include <linux/leds.h>
29 #include <linux/sizes.h>
30 #include <linux/backlight.h>
31 #include <linux/basic_mmio_gpio.h>
32 #include <linux/platform_device.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/mtd/nand-gpio.h>
35 
36 #include <mach/hardware.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <asm/setup.h>
40 #include <asm/mach-types.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 
44 #include <video/platform_lcd.h>
45 
46 #include "common.h"
47 #include "devices.h"
48 
49 #define P720T_USERLED		CLPS711X_GPIO(3, 0)
50 #define P720T_NAND_CLE		CLPS711X_GPIO(4, 0)
51 #define P720T_NAND_ALE		CLPS711X_GPIO(4, 1)
52 #define P720T_NAND_NCE		CLPS711X_GPIO(4, 2)
53 
54 #define P720T_NAND_BASE		(CLPS711X_SDRAM1_BASE)
55 
56 #define P720T_MMGPIO_BASE	(CLPS711X_NR_GPIO)
57 
58 #define SYSPLD_PHYS_BASE	IOMEM(CS1_PHYS_BASE)
59 
60 #define PLD_INT			(SYSPLD_PHYS_BASE + 0x000000)
61 #define PLD_INT_MMGPIO_BASE	(P720T_MMGPIO_BASE + 0)
62 #define PLD_INT_PENIRQ		(PLD_INT_MMGPIO_BASE + 5)
63 #define PLD_INT_UCB_IRQ		(PLD_INT_MMGPIO_BASE + 1)
64 #define PLD_INT_KBD_ATN		(PLD_INT_MMGPIO_BASE + 0) /* EINT1 */
65 
66 #define PLD_PWR			(SYSPLD_PHYS_BASE + 0x000004)
67 #define PLD_PWR_MMGPIO_BASE	(P720T_MMGPIO_BASE + 8)
68 #define PLD_PWR_EXT		(PLD_PWR_MMGPIO_BASE + 5)
69 #define PLD_PWR_MODE		(PLD_PWR_MMGPIO_BASE + 4) /* 1 = PWM, 0 = PFM */
70 #define PLD_S4_ON		(PLD_PWR_MMGPIO_BASE + 3) /* LCD bias voltage enable */
71 #define PLD_S3_ON		(PLD_PWR_MMGPIO_BASE + 2) /* LCD backlight enable */
72 #define PLD_S2_ON		(PLD_PWR_MMGPIO_BASE + 1) /* LCD 3V3 supply enable */
73 #define PLD_S1_ON		(PLD_PWR_MMGPIO_BASE + 0) /* LCD 3V supply enable */
74 
75 #define PLD_KBD			(SYSPLD_PHYS_BASE + 0x000008)
76 #define PLD_KBD_MMGPIO_BASE	(P720T_MMGPIO_BASE + 16)
77 #define PLD_KBD_WAKE		(PLD_KBD_MMGPIO_BASE + 1)
78 #define PLD_KBD_EN		(PLD_KBD_MMGPIO_BASE + 0)
79 
80 #define PLD_SPI			(SYSPLD_PHYS_BASE + 0x00000c)
81 #define PLD_SPI_MMGPIO_BASE	(P720T_MMGPIO_BASE + 24)
82 #define PLD_SPI_EN		(PLD_SPI_MMGPIO_BASE + 0)
83 
84 #define PLD_IO			(SYSPLD_PHYS_BASE + 0x000010)
85 #define PLD_IO_MMGPIO_BASE	(P720T_MMGPIO_BASE + 32)
86 #define PLD_IO_BOOTSEL		(PLD_IO_MMGPIO_BASE + 6) /* Boot sel switch */
87 #define PLD_IO_USER		(PLD_IO_MMGPIO_BASE + 5) /* User defined switch */
88 #define PLD_IO_LED3		(PLD_IO_MMGPIO_BASE + 4)
89 #define PLD_IO_LED2		(PLD_IO_MMGPIO_BASE + 3)
90 #define PLD_IO_LED1		(PLD_IO_MMGPIO_BASE + 2)
91 #define PLD_IO_LED0		(PLD_IO_MMGPIO_BASE + 1)
92 #define PLD_IO_LEDEN		(PLD_IO_MMGPIO_BASE + 0)
93 
94 #define PLD_IRDA		(SYSPLD_PHYS_BASE + 0x000014)
95 #define PLD_IRDA_MMGPIO_BASE	(P720T_MMGPIO_BASE + 40)
96 #define PLD_IRDA_EN		(PLD_IRDA_MMGPIO_BASE + 0)
97 
98 #define PLD_COM2		(SYSPLD_PHYS_BASE + 0x000018)
99 #define PLD_COM2_MMGPIO_BASE	(P720T_MMGPIO_BASE + 48)
100 #define PLD_COM2_EN		(PLD_COM2_MMGPIO_BASE + 0)
101 
102 #define PLD_COM1		(SYSPLD_PHYS_BASE + 0x00001c)
103 #define PLD_COM1_MMGPIO_BASE	(P720T_MMGPIO_BASE + 56)
104 #define PLD_COM1_EN		(PLD_COM1_MMGPIO_BASE + 0)
105 
106 #define PLD_AUD			(SYSPLD_PHYS_BASE + 0x000020)
107 #define PLD_AUD_MMGPIO_BASE	(P720T_MMGPIO_BASE + 64)
108 #define PLD_AUD_DIV1		(PLD_AUD_MMGPIO_BASE + 6)
109 #define PLD_AUD_DIV0		(PLD_AUD_MMGPIO_BASE + 5)
110 #define PLD_AUD_CLK_SEL1	(PLD_AUD_MMGPIO_BASE + 4)
111 #define PLD_AUD_CLK_SEL0	(PLD_AUD_MMGPIO_BASE + 3)
112 #define PLD_AUD_MIC_PWR		(PLD_AUD_MMGPIO_BASE + 2)
113 #define PLD_AUD_MIC_GAIN	(PLD_AUD_MMGPIO_BASE + 1)
114 #define PLD_AUD_CODEC_EN	(PLD_AUD_MMGPIO_BASE + 0)
115 
116 #define PLD_CF			(SYSPLD_PHYS_BASE + 0x000024)
117 #define PLD_CF_MMGPIO_BASE	(P720T_MMGPIO_BASE + 72)
118 #define PLD_CF2_SLEEP		(PLD_CF_MMGPIO_BASE + 5)
119 #define PLD_CF1_SLEEP		(PLD_CF_MMGPIO_BASE + 4)
120 #define PLD_CF2_nPDREQ		(PLD_CF_MMGPIO_BASE + 3)
121 #define PLD_CF1_nPDREQ		(PLD_CF_MMGPIO_BASE + 2)
122 #define PLD_CF2_nIRQ		(PLD_CF_MMGPIO_BASE + 1)
123 #define PLD_CF1_nIRQ		(PLD_CF_MMGPIO_BASE + 0)
124 
125 #define PLD_SDC			(SYSPLD_PHYS_BASE + 0x000028)
126 #define PLD_SDC_MMGPIO_BASE	(P720T_MMGPIO_BASE + 80)
127 #define PLD_SDC_INT_EN		(PLD_SDC_MMGPIO_BASE + 2)
128 #define PLD_SDC_WP		(PLD_SDC_MMGPIO_BASE + 1)
129 #define PLD_SDC_CD		(PLD_SDC_MMGPIO_BASE + 0)
130 
131 #define PLD_CODEC		(SYSPLD_PHYS_BASE + 0x400000)
132 #define PLD_CODEC_MMGPIO_BASE	(P720T_MMGPIO_BASE + 88)
133 #define PLD_CODEC_IRQ3		(PLD_CODEC_MMGPIO_BASE + 4)
134 #define PLD_CODEC_IRQ2		(PLD_CODEC_MMGPIO_BASE + 3)
135 #define PLD_CODEC_IRQ1		(PLD_CODEC_MMGPIO_BASE + 2)
136 #define PLD_CODEC_EN		(PLD_CODEC_MMGPIO_BASE + 0)
137 
138 #define PLD_BRITE		(SYSPLD_PHYS_BASE + 0x400004)
139 #define PLD_BRITE_MMGPIO_BASE	(P720T_MMGPIO_BASE + 96)
140 #define PLD_BRITE_UP		(PLD_BRITE_MMGPIO_BASE + 1)
141 #define PLD_BRITE_DN		(PLD_BRITE_MMGPIO_BASE + 0)
142 
143 #define PLD_LCDEN		(SYSPLD_PHYS_BASE + 0x400008)
144 #define PLD_LCDEN_MMGPIO_BASE	(P720T_MMGPIO_BASE + 104)
145 #define PLD_LCDEN_EN		(PLD_LCDEN_MMGPIO_BASE + 0)
146 
147 #define PLD_TCH			(SYSPLD_PHYS_BASE + 0x400010)
148 #define PLD_TCH_MMGPIO_BASE	(P720T_MMGPIO_BASE + 112)
149 #define PLD_TCH_PENIRQ		(PLD_TCH_MMGPIO_BASE + 1)
150 #define PLD_TCH_EN		(PLD_TCH_MMGPIO_BASE + 0)
151 
152 #define PLD_GPIO		(SYSPLD_PHYS_BASE + 0x400014)
153 #define PLD_GPIO_MMGPIO_BASE	(P720T_MMGPIO_BASE + 120)
154 #define PLD_GPIO2		(PLD_GPIO_MMGPIO_BASE + 2)
155 #define PLD_GPIO1		(PLD_GPIO_MMGPIO_BASE + 1)
156 #define PLD_GPIO0		(PLD_GPIO_MMGPIO_BASE + 0)
157 
158 static struct gpio p720t_gpios[] __initconst = {
159 	{ PLD_S1_ON,	GPIOF_OUT_INIT_LOW,	"PLD_S1_ON" },
160 	{ PLD_S2_ON,	GPIOF_OUT_INIT_LOW,	"PLD_S2_ON" },
161 	{ PLD_S3_ON,	GPIOF_OUT_INIT_LOW,	"PLD_S3_ON" },
162 	{ PLD_S4_ON,	GPIOF_OUT_INIT_LOW,	"PLD_S4_ON" },
163 	{ PLD_KBD_EN,	GPIOF_OUT_INIT_LOW,	"PLD_KBD_EN" },
164 	{ PLD_SPI_EN,	GPIOF_OUT_INIT_LOW,	"PLD_SPI_EN" },
165 	{ PLD_IO_USER,	GPIOF_OUT_INIT_LOW,	"PLD_IO_USER" },
166 	{ PLD_IO_LED0,	GPIOF_OUT_INIT_LOW,	"PLD_IO_LED0" },
167 	{ PLD_IO_LED1,	GPIOF_OUT_INIT_LOW,	"PLD_IO_LED1" },
168 	{ PLD_IO_LED2,	GPIOF_OUT_INIT_LOW,	"PLD_IO_LED2" },
169 	{ PLD_IO_LED3,	GPIOF_OUT_INIT_LOW,	"PLD_IO_LED3" },
170 	{ PLD_IO_LEDEN,	GPIOF_OUT_INIT_LOW,	"PLD_IO_LEDEN" },
171 	{ PLD_IRDA_EN,	GPIOF_OUT_INIT_LOW,	"PLD_IRDA_EN" },
172 	{ PLD_COM1_EN,	GPIOF_OUT_INIT_HIGH,	"PLD_COM1_EN" },
173 	{ PLD_COM2_EN,	GPIOF_OUT_INIT_HIGH,	"PLD_COM2_EN" },
174 	{ PLD_CODEC_EN,	GPIOF_OUT_INIT_LOW,	"PLD_CODEC_EN" },
175 	{ PLD_LCDEN_EN,	GPIOF_OUT_INIT_LOW,	"PLD_LCDEN_EN" },
176 	{ PLD_TCH_EN,	GPIOF_OUT_INIT_LOW,	"PLD_TCH_EN" },
177 	{ P720T_USERLED,GPIOF_OUT_INIT_LOW,	"USER_LED" },
178 };
179 
180 static struct resource p720t_mmgpio_resource[] __initdata = {
181 	DEFINE_RES_MEM_NAMED(0, 4, "dat"),
182 };
183 
184 static struct bgpio_pdata p720t_mmgpio_pdata = {
185 	.ngpio	= 8,
186 };
187 
188 static struct platform_device p720t_mmgpio __initdata = {
189 	.name		= "basic-mmio-gpio",
190 	.id		= -1,
191 	.resource	= p720t_mmgpio_resource,
192 	.num_resources	= ARRAY_SIZE(p720t_mmgpio_resource),
193 	.dev		= {
194 		.platform_data	= &p720t_mmgpio_pdata,
195 	},
196 };
197 
p720t_mmgpio_init(void __iomem * addrbase,int gpiobase)198 static void __init p720t_mmgpio_init(void __iomem *addrbase, int gpiobase)
199 {
200 	p720t_mmgpio_resource[0].start = (unsigned long)addrbase;
201 	p720t_mmgpio_pdata.base = gpiobase;
202 
203 	platform_device_register(&p720t_mmgpio);
204 }
205 
206 static struct {
207 	void __iomem	*addrbase;
208 	int		gpiobase;
209 } mmgpios[] __initconst = {
210 	{ PLD_INT,	PLD_INT_MMGPIO_BASE },
211 	{ PLD_PWR,	PLD_PWR_MMGPIO_BASE },
212 	{ PLD_KBD,	PLD_KBD_MMGPIO_BASE },
213 	{ PLD_SPI,	PLD_SPI_MMGPIO_BASE },
214 	{ PLD_IO,	PLD_IO_MMGPIO_BASE },
215 	{ PLD_IRDA,	PLD_IRDA_MMGPIO_BASE },
216 	{ PLD_COM2,	PLD_COM2_MMGPIO_BASE },
217 	{ PLD_COM1,	PLD_COM1_MMGPIO_BASE },
218 	{ PLD_AUD,	PLD_AUD_MMGPIO_BASE },
219 	{ PLD_CF,	PLD_CF_MMGPIO_BASE },
220 	{ PLD_SDC,	PLD_SDC_MMGPIO_BASE },
221 	{ PLD_CODEC,	PLD_CODEC_MMGPIO_BASE },
222 	{ PLD_BRITE,	PLD_BRITE_MMGPIO_BASE },
223 	{ PLD_LCDEN,	PLD_LCDEN_MMGPIO_BASE },
224 	{ PLD_TCH,	PLD_TCH_MMGPIO_BASE },
225 	{ PLD_GPIO,	PLD_GPIO_MMGPIO_BASE },
226 };
227 
228 static struct resource p720t_nand_resource[] __initdata = {
229 	DEFINE_RES_MEM(P720T_NAND_BASE, SZ_4),
230 };
231 
232 static struct mtd_partition p720t_nand_parts[] __initdata = {
233 	{
234 		.name	= "Flash partition 1",
235 		.offset	= 0,
236 		.size	= SZ_2M,
237 	},
238 	{
239 		.name	= "Flash partition 2",
240 		.offset	= MTDPART_OFS_APPEND,
241 		.size	= MTDPART_SIZ_FULL,
242 	},
243 };
244 
245 static struct gpio_nand_platdata p720t_nand_pdata __initdata = {
246 	.gpio_rdy	= -1,
247 	.gpio_nce	= P720T_NAND_NCE,
248 	.gpio_ale	= P720T_NAND_ALE,
249 	.gpio_cle	= P720T_NAND_CLE,
250 	.gpio_nwp	= -1,
251 	.chip_delay	= 15,
252 	.parts		= p720t_nand_parts,
253 	.num_parts	= ARRAY_SIZE(p720t_nand_parts),
254 };
255 
256 static struct platform_device p720t_nand_pdev __initdata = {
257 	.name		= "gpio-nand",
258 	.id		= -1,
259 	.resource	= p720t_nand_resource,
260 	.num_resources	= ARRAY_SIZE(p720t_nand_resource),
261 	.dev		= {
262 		.platform_data = &p720t_nand_pdata,
263 	},
264 };
265 
p720t_lcd_power_set(struct plat_lcd_data * pd,unsigned int power)266 static void p720t_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
267 {
268 	if (power) {
269 		gpio_set_value(PLD_LCDEN_EN, 1);
270 		gpio_set_value(PLD_S1_ON, 1);
271 		gpio_set_value(PLD_S2_ON, 1);
272 		gpio_set_value(PLD_S4_ON, 1);
273 	} else {
274 		gpio_set_value(PLD_S1_ON, 0);
275 		gpio_set_value(PLD_S2_ON, 0);
276 		gpio_set_value(PLD_S4_ON, 0);
277 		gpio_set_value(PLD_LCDEN_EN, 0);
278 	}
279 }
280 
281 static struct plat_lcd_data p720t_lcd_power_pdata = {
282 	.set_power	= p720t_lcd_power_set,
283 };
284 
p720t_lcd_backlight_set_intensity(int intensity)285 static void p720t_lcd_backlight_set_intensity(int intensity)
286 {
287 	gpio_set_value(PLD_S3_ON, intensity);
288 }
289 
290 static struct generic_bl_info p720t_lcd_backlight_pdata = {
291 	.name			= "lcd-backlight.0",
292 	.default_intensity	= 0x01,
293 	.max_intensity		= 0x01,
294 	.set_bl_intensity	= p720t_lcd_backlight_set_intensity,
295 };
296 
297 static void __init
fixup_p720t(struct tag * tag,char ** cmdline)298 fixup_p720t(struct tag *tag, char **cmdline)
299 {
300 	/*
301 	 * Our bootloader doesn't setup any tags (yet).
302 	 */
303 	if (tag->hdr.tag != ATAG_CORE) {
304 		tag->hdr.tag = ATAG_CORE;
305 		tag->hdr.size = tag_size(tag_core);
306 		tag->u.core.flags = 0;
307 		tag->u.core.pagesize = PAGE_SIZE;
308 		tag->u.core.rootdev = 0x0100;
309 
310 		tag = tag_next(tag);
311 		tag->hdr.tag = ATAG_MEM;
312 		tag->hdr.size = tag_size(tag_mem32);
313 		tag->u.mem.size = 4096;
314 		tag->u.mem.start = PHYS_OFFSET;
315 
316 		tag = tag_next(tag);
317 		tag->hdr.tag = ATAG_NONE;
318 		tag->hdr.size = 0;
319 	}
320 }
321 
322 static struct gpio_led p720t_gpio_leds[] = {
323 	{
324 		.name			= "User LED",
325 		.default_trigger	= "heartbeat",
326 		.gpio			= P720T_USERLED,
327 	},
328 };
329 
330 static struct gpio_led_platform_data p720t_gpio_led_pdata __initdata = {
331 	.leds		= p720t_gpio_leds,
332 	.num_leds	= ARRAY_SIZE(p720t_gpio_leds),
333 };
334 
p720t_init(void)335 static void __init p720t_init(void)
336 {
337 	int i;
338 
339 	clps711x_devices_init();
340 
341 	for (i = 0; i < ARRAY_SIZE(mmgpios); i++)
342 		p720t_mmgpio_init(mmgpios[i].addrbase, mmgpios[i].gpiobase);
343 
344 	platform_device_register(&p720t_nand_pdev);
345 }
346 
p720t_init_late(void)347 static void __init p720t_init_late(void)
348 {
349 	WARN_ON(gpio_request_array(p720t_gpios, ARRAY_SIZE(p720t_gpios)));
350 
351 	platform_device_register_data(NULL, "platform-lcd", 0,
352 				      &p720t_lcd_power_pdata,
353 				      sizeof(p720t_lcd_power_pdata));
354 	platform_device_register_data(NULL, "generic-bl", 0,
355 				      &p720t_lcd_backlight_pdata,
356 				      sizeof(p720t_lcd_backlight_pdata));
357 	platform_device_register_simple("video-clps711x", 0, NULL, 0);
358 	platform_device_register_data(NULL, "leds-gpio", 0,
359 				      &p720t_gpio_led_pdata,
360 				      sizeof(p720t_gpio_led_pdata));
361 }
362 
363 MACHINE_START(P720T, "ARM-Prospector720T")
364 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
365 	.atag_offset	= 0x100,
366 	.fixup		= fixup_p720t,
367 	.map_io		= clps711x_map_io,
368 	.init_irq	= clps711x_init_irq,
369 	.init_time	= clps711x_timer_init,
370 	.init_machine	= p720t_init,
371 	.init_late	= p720t_init_late,
372 	.restart	= clps711x_restart,
373 MACHINE_END
374