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Searched refs:PWRSTS_OFF_RET (Results 1 – 9 of 9) sorted by relevance

/arch/arm/mach-omap2/
Dpowerdomains7xx_data.c42 [0] = PWRSTS_OFF_RET, /* hwa_mem */
43 [1] = PWRSTS_OFF_RET, /* sl2_mem */
44 [2] = PWRSTS_OFF_RET, /* tcm1_mem */
45 [3] = PWRSTS_OFF_RET, /* tcm2_mem */
48 [0] = PWRSTS_OFF_RET, /* hwa_mem */
49 [1] = PWRSTS_OFF_RET, /* sl2_mem */
50 [2] = PWRSTS_OFF_RET, /* tcm1_mem */
51 [3] = PWRSTS_OFF_RET, /* tcm2_mem */
82 [0] = PWRSTS_OFF_RET, /* aessmem */
83 [1] = PWRSTS_OFF_RET, /* periphmem */
[all …]
Dpowerdomains54xx_data.c41 [0] = PWRSTS_OFF_RET, /* core_nret_bank */
42 [1] = PWRSTS_OFF_RET, /* core_ocmram */
43 [2] = PWRSTS_OFF_RET, /* core_other_bank */
44 [3] = PWRSTS_OFF_RET, /* ipu_l2ram */
45 [4] = PWRSTS_OFF_RET, /* ipu_unicache */
48 [0] = PWRSTS_OFF_RET, /* core_nret_bank */
49 [1] = PWRSTS_OFF_RET, /* core_ocmram */
50 [2] = PWRSTS_OFF_RET, /* core_other_bank */
51 [3] = PWRSTS_OFF_RET, /* ipu_l2ram */
52 [4] = PWRSTS_OFF_RET, /* ipu_unicache */
[all …]
Dpowerdomains44xx_data.c40 .pwrsts_logic_ret = PWRSTS_OFF_RET,
46 [3] = PWRSTS_OFF_RET, /* ducati_l2ram */
47 [4] = PWRSTS_OFF_RET, /* ducati_unicache */
121 .pwrsts_logic_ret = PWRSTS_OFF_RET,
125 [1] = PWRSTS_OFF_RET, /* tesla_l1 */
126 [2] = PWRSTS_OFF_RET, /* tesla_l2 */
159 .pwrsts_logic_ret = PWRSTS_OFF_RET,
162 [0] = PWRSTS_OFF_RET, /* cpu0_l1 */
176 .pwrsts_logic_ret = PWRSTS_OFF_RET,
179 [0] = PWRSTS_OFF_RET, /* cpu1_l1 */
[all …]
Dpowerdomains43xx_data.c39 .pwrsts_logic_ret = PWRSTS_OFF_RET,
42 [0] = PWRSTS_OFF_RET, /* mpu_l1 */
43 [1] = PWRSTS_OFF_RET, /* mpu_l2 */
44 [2] = PWRSTS_OFF_RET, /* mpu_ram */
97 .pwrsts_logic_ret = PWRSTS_OFF_RET,
100 [0] = PWRSTS_OFF_RET, /* icss_mem */
101 [1] = PWRSTS_OFF_RET, /* per_mem */
102 [2] = PWRSTS_OFF_RET, /* ram1_mem */
103 [3] = PWRSTS_OFF_RET, /* ram2_mem */
Dpowerdomains33xx_data.c31 .pwrsts_logic_ret = PWRSTS_OFF_RET,
48 [0] = PWRSTS_OFF_RET, /* gfx_mem */
82 .pwrsts_logic_ret = PWRSTS_OFF_RET,
107 [0] = PWRSTS_OFF_RET, /* pruss_mem */
108 [1] = PWRSTS_OFF_RET, /* per_mem */
109 [2] = PWRSTS_OFF_RET, /* ram_mem */
125 .pwrsts_logic_ret = PWRSTS_OFF_RET,
150 [0] = PWRSTS_OFF_RET, /* mpu_l1 */
151 [1] = PWRSTS_OFF_RET, /* mpu_l2 */
152 [2] = PWRSTS_OFF_RET, /* mpu_ram */
Dpowerdomains3xxx_data.c39 .pwrsts_logic_ret = PWRSTS_OFF_RET,
42 [0] = PWRSTS_OFF_RET,
43 [1] = PWRSTS_OFF_RET,
44 [2] = PWRSTS_OFF_RET,
45 [3] = PWRSTS_OFF_RET,
60 .pwrsts_logic_ret = PWRSTS_OFF_RET,
64 [0] = PWRSTS_OFF_RET,
102 .pwrsts_logic_ret = PWRSTS_OFF_RET,
105 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
106 [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
[all …]
Dpowerdomains2xxx_data.c48 .pwrsts_logic_ret = PWRSTS_OFF_RET,
66 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
67 [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
68 [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */
Dpowerdomain.h39 #define PWRSTS_OFF_RET (PWRSTS_OFF | PWRSTS_RET) macro
41 #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON)
Dpowerdomain.c147 if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) && in _update_logic_membank_counters()
154 if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) && in _update_logic_membank_counters()