Searched refs:RAM (Results 1 – 25 of 62) sorted by relevance
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/arch/arm/mach-socfpga/ |
D | Kconfig | 15 bool "Suspend to RAM on SOCFPGA" 17 Select this if you want to enable Suspend-to-RAM on SOCFPGA
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/arch/arm/mach-shmobile/ |
D | pm-rcar-gen2.c | 30 #define RAM 0xe6300000 macro 83 boot_vector_addr = RAM; in rcar_gen2_pm_init()
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/arch/m68k/ |
D | Kconfig.machine | 325 comment "RAM configuration" 328 hex "Address of the base of RAM" 331 Define the address that RAM starts at. On many platforms this is 333 platforms choose to setup their RAM at other addresses within the 337 hex "Size of RAM (in bytes), or 0 for automatic" 340 Define the size of the system RAM. If you select 0 then the 341 kernel will try to probe the RAM size at runtime. This is not 349 put at the start of RAM, but it doesn't have to be. On ColdFire 380 of RAM, but usually some small offset from it. Define the start 382 processor vectors at the base of RAM and then the start of the [all …]
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/arch/arm/mm/ |
D | proc-arm740.S | 77 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM 78 ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB) 85 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
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D | proc-arm940.S | 299 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM 300 ldr r7, =CONFIG_DRAM_SIZE >> 12 @ size of RAM (must be >= 4KB) 302 mcr p15, 0, r3, c6, c1, 0 @ set area 1, RAM
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/arch/x86/xen/ |
D | Kconfig | 32 Limit paravirtualized user domains to 512GB of RAM. 35 pv-domains with more than 512 GB of RAM. This option controls the
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/arch/sh/include/mach-ecovec24/mach/ |
D | partner-jet-setup.txt | 5 LIST "zImage (RAM boot)" 6 LIST "This script can be used to boot the kernel from RAM via JTAG:"
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/arch/mn10300/mm/ |
D | cache-flush-by-tag.S | 45 # Flush the entire data cache back to RAM
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D | cache-inv-by-tag.S | 151 clr d2 # we're going to clear tag RAM 154 # read the tags from the tag RAM, and if they indicate a valid dirty 159 add d0,a0 # starting dcache tag RAM
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D | cache-dbg-flush-by-reg.S | 25 # Flush the entire data cache back to RAM and invalidate the icache
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D | cache-dbg-flush-by-tag.S | 26 # Flush the entire data cache back to RAM and invalidate the icache
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/arch/frv/kernel/ |
D | head-uc-fr451.S | 67 # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible 87 # GR8 = base of uncovered RAM 88 # GR9 = top of uncovered RAM
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/arch/unicore32/configs/ |
D | unicore32_defconfig | 8 # Initial RAM filesystem and RAM disk (initramfs/initrd) support 81 # RAM/ROM/Flash chip drivers
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/arch/m68k/hp300/ |
D | README.hp300 | 6 Currently only 9000/340 machines have been tested. Any amount of RAM should
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/arch/cris/arch-v10/ |
D | README.mm | 41 As a comparison, the Linux/i386 2.0 puts the kernel and physical RAM at 44 map through. That changed in 2.2, putting the kernel/physical RAM at 89 It also means that the total physical RAM that can be mapped is 256 MB 90 (kseg_c above). More RAM can be mapped by choosing a different segmentation 103 chunks of memory not possible using the normal kmalloc physical RAM 129 ( base_c, 0x4 ) | // physical RAM cached area 229 get_vm_area(size). After that, physical RAM pages are allocated and put into
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/arch/arm/mach-realview/ |
D | Kconfig | 122 RealView boards other than PB1176 have the RAM available at 124 the board supports 512MB of RAM, this option allows the 127 RAM to be used with SPARSEMEM.
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/arch/arm/boot/dts/ |
D | kirkwood-ts219-6281.dts | 15 /* RAM: 0: 256 MB, 1: 512 MB */
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D | kirkwood-ts219-6282.dts | 25 /* RAM: 0: 256 MB, 1: 512 MB */
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D | armada-xp-matrix.dts | 61 * This board has 4 GB of RAM, but the last 256 MB of 62 * RAM are not usable due to the overlap with the MBus
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D | vexpress-v2p-ca9.dts | 230 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ 275 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ 289 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
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/arch/arm/mach-prima2/ |
D | sleep.S | 47 @ the RAM is going to self refresh mode
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/arch/m68k/kernel/ |
D | vmlinux-nommu.lds | 6 * This linker script is equipped to build either ROM loaded or RAM
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/arch/sh/include/mach-kfr2r09/mach/ |
D | partner-jet-setup.txt | 4 LIST "zImage (RAM boot)" 5 LIST "This script can be used to boot the kernel from RAM via JTAG:"
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/arch/xtensa/kernel/ |
D | head.S | 231 l32i a4, a2, 0 # start destination (in RAM) 232 l32i a5, a2, 4 # end desination (in RAM)
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/arch/powerpc/boot/dts/ |
D | wii.dts | 20 * contiguous RAM range and will BUG() if the memreserve is outside 23 /*/memreserve/ 0x10000000 0x0004000;*/ /* DSP RAM */
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