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Searched refs:REGS (Results 1 – 5 of 5) sorted by relevance

/arch/hexagon/include/asm/
Delf.h108 #define CS_COPYREGS(DEST,REGS) \ argument
110 DEST.cs0 = REGS->cs0;\
111 DEST.cs1 = REGS->cs1;\
114 #define CS_COPYREGS(DEST,REGS) argument
117 #define ELF_CORE_COPY_REGS(DEST, REGS) \ argument
119 DEST.r0 = REGS->r00; \
120 DEST.r1 = REGS->r01; \
121 DEST.r2 = REGS->r02; \
122 DEST.r3 = REGS->r03; \
123 DEST.r4 = REGS->r04; \
[all …]
/arch/arm/probes/
Ddecode-arm.c164 REGS(0, NOPC, 0, 0, 0)),
171 REGS(0, 0, 0, 0, NOPC)),
175 REGS(0, NOPC, 0, 0, NOPC)),
182 REGS(NOPC, NOPC, 0, 0, NOPC)),
198 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
204 REGS(NOPC, 0, NOPC, 0, NOPC)),
210 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
221 REGS(NOPC, 0, NOPC, 0, NOPC)),
228 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
241 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
[all …]
Ddecode-thumb.c57 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)),
62 REGS(NOSP, 0, 0, 0, NOSPPC)),
82 REGS(NOSPPC, 0, 0, 0, NOSPPC)),
88 REGS(NOPC, 0, 0, 0, NOSPPC)),
93 REGS(0, 0, NOSPPC, 0, NOSPPC)),
108 REGS(SP, 0, SP, 0, NOSPPC)),
117 REGS(SP, 0, NOPC, 0, NOSPPC)),
131 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
142 REGS(NOSPPC, 0, 0, 0, 0)),
148 REGS(NOPC, 0, 0, 0, 0)),
[all …]
Ddecode.h294 #define REGS(r16, r12, r8, r4, r0) \ macro
/arch/alpha/include/asm/
Delf.h113 #define ELF_CORE_COPY_REGS(DEST, REGS) \ argument
114 dump_elf_thread(DEST, REGS, current_thread_info());