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Searched refs:RSI_MASK0 (Results 1 – 5 of 5) sorted by relevance

/arch/blackfin/mach-bf518/include/mach/
DdefBF514.h30 #define RSI_MASK0 0xFFC0383C /* RSI Interrupt 0 Mask Register */ macro
DcdefBF514.h45 #define bfin_read_RSI_MASK0() bfin_read32(RSI_MASK0)
46 #define bfin_write_RSI_MASK0(val) bfin_write32(RSI_MASK0, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h51 #define RSI_MASK0 0xFFC0063C /* RSI0 Interrupt 0 Mask Register */ macro
DcdefBF60x_base.h3217 #define bfin_read_RSI_MASK0() bfin_read32(RSI_MASK0)
3218 #define bfin_write_RSI_MASK0(val) bfin_write32(RSI_MASK0, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c1386 D32(RSI_MASK0); in bfin_debug_mmrs_init()