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Searched refs:S5P_TOP_RETENTION_LOWPWR (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
Dpmu.c181 { S5P_TOP_RETENTION_LOWPWR, { 0x1, 0x0, 0x1 } },
269 { S5P_TOP_RETENTION_LOWPWR, { 0x1, 0x0, 0x1 } },
Dregs-pmu.h90 #define S5P_TOP_RETENTION_LOWPWR 0x1184 macro