Searched refs:SDRC_RFR_CTRL_100MHz (Results 1 – 3 of 3) sorted by relevance
/arch/arm/mach-omap2/ |
D | opp2420_data.c | 67 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz, 73 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz, 93 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz, 99 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz,
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D | opp2430_data.c | 83 SDRC_RFR_CTRL_100MHz, 115 SDRC_RFR_CTRL_100MHz,
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D | sdrc.h | 190 #define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1) macro
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