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Searched refs:SPR_DCCFGR_CBS (Results 1 – 3 of 3) sorted by relevance

/arch/openrisc/kernel/
Dsetup.c185 cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7); in setup_cpuinfo()
Dhead.S724 l.andi r26,r24,SPR_DCCFGR_CBS
/arch/openrisc/include/asm/
Dspr_defs.h312 #define SPR_DCCFGR_CBS 0x00000080 macro