Home
last modified time | relevance | path

Searched refs:SPR_ITLBMR_BASE (Results 1 – 3 of 3) sorted by relevance

/arch/openrisc/mm/
Dtlb.c63 mtspr_off(SPR_ITLBMR_BASE(0), i, 0); in flush_tlb_all()
87 mtspr_off(SPR_ITLBMR_BASE(0), ITLB_OFFSET(addr), 0);
/arch/openrisc/include/asm/
Dspr_defs.h77 #define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) macro
/arch/openrisc/kernel/
Dhead.S527 LOAD_SYMBOL_2_GPR(r6,SPR_ITLBMR_BASE(0))
918 l.mtspr r2,r5,SPR_ITLBMR_BASE(0) // set ITLBMR
1166 l.mtspr r5,r4,SPR_ITLBMR_BASE(0)