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Searched refs:SPR_SR_SM (Results 1 – 7 of 7) sorted by relevance

/arch/openrisc/include/asm/
Dptrace.h74 #define user_mode(regs) (((regs)->sr & SPR_SR_SM) == 0)
Dprocessor.h30 | SPR_SR_DCE | SPR_SR_SM)
Dspr_defs.h205 #define SPR_SR_SM 0x00000001 /* Supervisor Mode */ macro
/arch/openrisc/kernel/
Dprocess.c196 unsigned long sr = mfspr(SPR_SR) & ~SPR_SR_SM; in start_thread()
Dsignal.c61 regs->sr &= ~SPR_SR_SM; in restore_sigcontext()
Dhead.S46 #define EXCEPTION_SR (SPR_SR_DME | SPR_SR_IME | SPR_SR_DCE | SPR_SR_ICE | SPR_SR_SM)
47 …SCALL_SR (SPR_SR_DME | SPR_SR_IME | SPR_SR_DCE | SPR_SR_ICE | SPR_SR_IEE | SPR_SR_TEE | SPR_SR_SM)
159 l.andi r30,r30,SPR_SR_SM ;\
795 l.andi r6,r6,SPR_SR_SM // are we in kernel mode ?
891 l.andi r6,r6,SPR_SR_SM // are we in kernel mode ?
Dentry.S905 l.andi r3,r4,SPR_SR_SM