Searched refs:STBCR3 (Results 1 – 6 of 6) sorted by relevance
| /arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 20 #define STBCR3 0xfffe0408 macro
100 [MSTP35] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 6, 0), /* MTU2 */
101 [MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */
102 [MSTP33] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 3, 0), /* SDHI1 */
103 [MSTP32] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */
104 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
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| D | clock-sh7269.c | 20 #define STBCR3 0xfffe0408 macro
136 [MSTP35] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 5, 0), /* MTU2 */
137 [MSTP32] = SH_CLK_MSTP8(&peripheral1_clk, STBCR3, 2, 0), /* ADC */
138 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
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| D | setup-sh7206.c | 284 #define STBCR3 0xfffe0408 macro
293 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3); in plat_early_device_setup()
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| D | setup-sh7201.c | 419 #define STBCR3 0xfffe0408 macro
424 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3); in plat_early_device_setup()
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| D | setup-sh7203.c | 352 #define STBCR3 0xfffe0408 macro
361 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3); in plat_early_device_setup()
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| /arch/sh/kernel/cpu/sh2/ |
| D | setup-sh7619.c | 202 #define STBCR3 0xf80a0000 macro
207 __raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3); in plat_early_device_setup()
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