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Searched refs:TIMER_ENABLE0 (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/include/asm/
Dgptimers.h35 # define TIMER0_GROUP_REG TIMER_ENABLE0
/arch/blackfin/kernel/
Ddebug-mmrs.c1065 #ifdef TIMER_ENABLE0 in bfin_debug_mmrs_init()
1066 GPTIMER_GROUP(TIMER_ENABLE0, 0); in bfin_debug_mmrs_init()
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h686 #define TIMER_ENABLE0 0xffc01680 /* Timer Group of 8 Enable Register */ macro
DcdefBF54x_base.h1147 #define bfin_read_TIMER_ENABLE0() bfin_read16(TIMER_ENABLE0)
1148 #define bfin_write_TIMER_ENABLE0(val) bfin_write16(TIMER_ENABLE0, val)