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Searched refs:TMR0 (Results 1 – 3 of 3) sorted by relevance

/arch/sh/kernel/cpu/sh2a/
Dsetup-sh7201.c46 TMR0, TMR1, enumerator
141 INTC_IRQ(TMR0, 246), INTC_IRQ(TMR0, 247),
142 INTC_IRQ(TMR0, 248),
168 { 0xfffe9814, 0, 16, 4, /* IPR16 */ { SSI0_SSII, SSI1_SSII, TMR0, TMR1 } },
/arch/blackfin/mach-bf518/
DKconfig69 TMRCLK TMR0 TMR1
76 PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
81 PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
/arch/blackfin/mach-bf527/
DKconfig141 bool "Enable Hysteresis on {TMR0, PPI_FS1, PPI_CLK}"