Searched refs:TRM (Results 1 – 4 of 4) sorted by relevance
77 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
61 * See TRM "Table 1-317. L4LS Instance Summary", just deduct267 /* See TRM "Table 1-318. L4HS Instance Summary" */
180 /* data lines, gpmc_d0..d7 not muxable according to TRM */192 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
128 #define TRM 0x4000 /* Transmit Mode */ macro