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Searched refs:UDCCR_RSTIR (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-pxa/include/mach/
Dpxa25x-udc.h19 #define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */ macro
/arch/arm/mach-ixp4xx/include/mach/
Dixp4xx-regs.h511 #define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */ macro