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Searched refs:VEC_HWERR (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/include/asm/
Dtraps.h48 #define VEC_HWERR (63) macro
/arch/blackfin/kernel/
Dtraps.c352 case VEC_HWERR: in trap_c()
493 if ((ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8)) || in trap_c()
494 (ANOMALY_05000281 && trapnr == VEC_HWERR) || in trap_c()
Dtrace.c741 if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) in dump_bfin_process()
819 if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR && in dump_bfin_mem()
890 if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) { in show_regs()
951 (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) { in show_regs()
/arch/blackfin/mach-common/
Dinterrupt.S188 R1.L = LO(VEC_HWERR);
189 R1.H = HI(VEC_HWERR);