Home
last modified time | relevance | path

Searched refs:_PAGE_WRITETHRU (Results 1 – 17 of 17) sorted by relevance

/arch/powerpc/include/asm/
Dpte-hash64.h24 #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */ macro
35 #define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
Dpte-common.h25 #ifndef _PAGE_WRITETHRU
26 #define _PAGE_WRITETHRU 0 macro
101 _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
Dpte-44x.h85 #define _PAGE_WRITETHRU 0x00000800 /* H: W bit */ macro
Dpte-fsl-booke.h30 #define _PAGE_WRITETHRU 0x00400 /* H: W bit */ macro
Dpte-40x.h43 #define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ macro
Dpte-hash32.h25 #define _PAGE_WRITETHRU 0x040 /* W: cache write-through */ macro
Dpte-8xx.h43 #define _PAGE_WRITETHRU 0x0080 /* software: caching is write through */ macro
Dpte-book3e.h47 #define _PAGE_WRITETHRU 0x800000 /* W: cache write-through */ macro
Dpgtable.h196 _PAGE_WRITETHRU)
208 _PAGE_COHERENT | _PAGE_WRITETHRU))
Dkvm_book3s_64.h337 #if _PAGE_NO_CACHE == HPTE_R_I && _PAGE_WRITETHRU == HPTE_R_W in hpte_cache_bits()
341 ((pte_val & _PAGE_WRITETHRU) ? HPTE_R_W : 0); in hpte_cache_bits()
/arch/powerpc/mm/
Dppc_mmu_32.c131 wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE in setbat()
149 wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE in setbat()
Dhugetlbpage-hash64.c100 rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE | in __hash_page_huge()
Dhugepage-hash64.c135 rflags |= (new_pmd & (_PAGE_WRITETHRU | _PAGE_NO_CACHE | in __hash_page_thp()
Dfsl_booke_mmu.c124 TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0; in settlbcam()
/arch/microblaze/include/asm/
Dpgtable.h102 _PAGE_WRITETHRU)
210 #define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ macro
/arch/xtensa/kernel/
Dpci.c350 prot |= _PAGE_WRITETHRU; in __pci_mmap_set_pgprot()
/arch/powerpc/platforms/pseries/
Dlpar.c156 if ((rflags & _PAGE_NO_CACHE) && !(rflags & _PAGE_WRITETHRU)) in pSeries_lpar_hpte_insert()