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Searched refs:_SA1101 (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-sa1100/include/mach/
DSA-1101.h73 #define _SA1101( x ) ((x) + SA1101_BASE) macro
84 #define _SKCR _SA1101( 0x00000000 ) /* SA-1101 Control Reg. */
85 #define _SMCR _SA1101( 0x00140000 ) /* Shared Mem. Control Reg. */
86 #define _SNPR _SA1101( 0x00140400 ) /* Snoop Reg. */
134 #define _VMCCR _SA1101( 0x00100000 ) /* Configuration register */
135 #define _VMCAR _SA1101( 0x00101000 ) /* VMC address register */
136 #define _VMCDR _SA1101( 0x00101400 ) /* VMC data register */
166 #define _UFCR _SA1101(0x00120000) /* Update FIFO Control Reg. */
167 #define _UFSR _SA1101(0x00120400) /* Update FIFO Status Reg. */
168 #define _UFLVLR _SA1101(0x00120800) /* Update FIFO level reg. */
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