/arch/arc/include/asm/ |
D | bitops.h | 32 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\ 63 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\ 110 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\ 127 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\ 149 static inline void __##op##_bit(unsigned long nr, volatile unsigned long *m) \ 159 static inline int __test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
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/arch/sh/kernel/cpu/sh4a/ |
D | clock-sh7366.c | 120 #define DIV4(_reg, _bit, _mask, _flags) \ argument 121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags) 140 #define MSTP(_parent, _reg, _bit, _flags) \ argument 141 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
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D | clock-sh7757.c | 65 #define DIV4(_bit, _mask, _flags) \ argument 66 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
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D | clock-shx3.c | 64 #define DIV4(_bit, _mask, _flags) \ argument 65 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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D | clock-sh7343.c | 117 #define DIV4(_reg, _bit, _mask, _flags) \ argument 118 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags) 137 #define MSTP(_parent, _reg, _bit, _flags) \ argument 138 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
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D | clock-sh7785.c | 69 #define DIV4(_bit, _mask, _flags) \ argument 70 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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D | clock-sh7786.c | 70 #define DIV4(_bit, _mask, _flags) \ argument 71 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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D | clock-sh7722.c | 120 #define DIV4(_reg, _bit, _mask, _flags) \ argument 121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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D | clock-sh7734.c | 72 #define DIV4(_reg, _bit, _mask, _flags) \ argument 73 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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D | clock-sh7723.c | 123 #define DIV4(_reg, _bit, _mask, _flags) \ argument 124 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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D | clock-sh7724.c | 162 #define DIV4(_reg, _bit, _mask, _flags) \ argument 163 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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/arch/sh/kernel/cpu/sh2a/ |
D | clock-sh7264.c | 80 #define DIV4(_reg, _bit, _mask, _flags) \ argument 81 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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D | clock-sh7269.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument 109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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