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Searched refs:_bit (Results 1 – 13 of 13) sorted by relevance

/arch/arc/include/asm/
Dbitops.h32 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
63 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
110 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
127 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
149 static inline void __##op##_bit(unsigned long nr, volatile unsigned long *m) \
159 static inline int __test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
140 #define MSTP(_parent, _reg, _bit, _flags) \ argument
141 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
Dclock-sh7757.c65 #define DIV4(_bit, _mask, _flags) \ argument
66 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
Dclock-shx3.c64 #define DIV4(_bit, _mask, _flags) \ argument
65 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7343.c117 #define DIV4(_reg, _bit, _mask, _flags) \ argument
118 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
137 #define MSTP(_parent, _reg, _bit, _flags) \ argument
138 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
Dclock-sh7785.c69 #define DIV4(_bit, _mask, _flags) \ argument
70 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7786.c70 #define DIV4(_bit, _mask, _flags) \ argument
71 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7722.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7734.c72 #define DIV4(_reg, _bit, _mask, _flags) \ argument
73 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7723.c123 #define DIV4(_reg, _bit, _mask, _flags) \ argument
124 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7724.c162 #define DIV4(_reg, _bit, _mask, _flags) \ argument
163 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c80 #define DIV4(_reg, _bit, _mask, _flags) \ argument
81 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7269.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)