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Searched refs:actlr (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mm/
Dcache-tauros2.c166 u32 actlr; in read_actlr() local
168 __asm__("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr)); in read_actlr()
170 return actlr; in read_actlr()
173 static inline void __init write_actlr(u32 actlr) in write_actlr() argument
175 __asm__("mcr p15, 0, %0, c1, c0, 1\n" : : "r" (actlr)); in write_actlr()
246 u32 actlr; in tauros2_internal_init() local
254 actlr = read_actlr(); in tauros2_internal_init()
255 if (!(actlr & 0x00000002)) { in tauros2_internal_init()
257 write_actlr(actlr | 0x00000002); in tauros2_internal_init()
/arch/arm64/kvm/
Dsys_regs_generic_v8.c46 u64 actlr; in reset_actlr() local
48 asm volatile("mrs %0, actlr_el1\n" : "=r" (actlr)); in reset_actlr()
49 vcpu_sys_reg(vcpu, ACTLR_EL1) = actlr; in reset_actlr()
/arch/arm/kvm/
Dcoproc.c164 u32 actlr; in reset_actlr() local
167 asm volatile("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr)); in reset_actlr()
170 actlr |= 1U << 6; in reset_actlr()
172 actlr &= ~(1U << 6); in reset_actlr()
174 vcpu->arch.cp15[c1_ACTLR] = actlr; in reset_actlr()
/arch/arm/mach-tegra/
Dsleep-tegra20.S257 mrc p15, 0, r11, c1, c0, 1 @ save actlr before exiting coherency