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Searched refs:b10 (Results 1 – 7 of 7) sorted by relevance

/arch/arm64/kvm/
Dsys_regs.c444 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b100), \
447 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b101), \
450 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b110), \
453 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm((n)), Op2(0b111), \
489 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm(0b0010), Op2(0b000),
492 { Op0(0b10), Op1(0b000), CRn(0b0000), CRm(0b0010), Op2(0b010),
510 { Op0(0b10), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b000),
513 { Op0(0b10), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b100),
516 { Op0(0b10), Op1(0b000), CRn(0b0001), CRm(0b0001), Op2(0b100),
519 { Op0(0b10), Op1(0b000), CRn(0b0001), CRm(0b0011), Op2(0b100),
[all …]
/arch/c6x/include/uapi/asm/
Dptrace.h138 REG_PAIR(b11, b10);
/arch/c6x/kernel/
Dasm-offsets.c76 OFFSET(REGS_B10, pt_regs, b10); in foo()
Dtraps.c47 pr_err("A10: %08lx B10: %08lx\n", regs->a10, regs->b10); in show_regs()
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h2223 #define MUX(b15,b14,b13,b12,b11,b10,b9,b8,b7,b6,b5,b4,b3,b2,b1,b0) \ argument
2229 (((b10)&3) << 20) | \
/arch/m68k/ifpsp060/
Dpfpsp.sa1148 dc.l $41eeff84,$60a44a28,$00006b10,$f23c4400
1157 dc.l $0080ff88,$41eeff84,$60b44a28,$00006b10
Dfplsp.sa1887 dc.l $00006bea,$60d84a28,$00006b10,$f23c4400