Searched refs:bfin_read16 (Results 1 – 25 of 31) sorted by relevance
12
18 #define bfin_read_CAN1_MC1() bfin_read16(CAN1_MC1)20 #define bfin_read_CAN1_MD1() bfin_read16(CAN1_MD1)22 #define bfin_read_CAN1_TRS1() bfin_read16(CAN1_TRS1)24 #define bfin_read_CAN1_TRR1() bfin_read16(CAN1_TRR1)26 #define bfin_read_CAN1_TA1() bfin_read16(CAN1_TA1)28 #define bfin_read_CAN1_AA1() bfin_read16(CAN1_AA1)30 #define bfin_read_CAN1_RMP1() bfin_read16(CAN1_RMP1)32 #define bfin_read_CAN1_RML1() bfin_read16(CAN1_RML1)34 #define bfin_read_CAN1_MBTIF1() bfin_read16(CAN1_MBTIF1)36 #define bfin_read_CAN1_MBRIF1() bfin_read16(CAN1_MBRIF1)[all …]
17 #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)25 #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)33 #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)44 #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)46 #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)53 #define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS)55 #define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT)57 #define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY)59 #define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT)61 #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)[all …]
17 #define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL)19 #define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS)21 #define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR)23 #define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF)25 #define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF)27 #define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK)29 #define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS)31 #define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN)33 #define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS)35 #define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STATE)[all …]
17 #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)25 #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)33 #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)44 #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)46 #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)53 #define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)55 #define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)57 #define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)59 #define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)65 #define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)[all …]
16 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)17 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)19 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)20 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)22 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)32 #define bfin_read_SWRST() bfin_read16(SWRST)34 #define bfin_read_SYSCR() bfin_read16(SYSCR)92 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)103 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)105 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)[all …]
18 #define bfin_read_MXVR_CONFIG() bfin_read16(MXVR_CONFIG)32 #define bfin_read_MXVR_POSITION() bfin_read16(MXVR_POSITION)34 #define bfin_read_MXVR_MAX_POSITION() bfin_read16(MXVR_MAX_POSITION)36 #define bfin_read_MXVR_DELAY() bfin_read16(MXVR_DELAY)38 #define bfin_read_MXVR_MAX_DELAY() bfin_read16(MXVR_MAX_DELAY)42 #define bfin_read_MXVR_GADDR() bfin_read16(MXVR_GADDR)105 #define bfin_read_MXVR_DMA0_COUNT() bfin_read16(MXVR_DMA0_COUNT)109 #define bfin_read_MXVR_DMA0_CURR_COUNT() bfin_read16(MXVR_DMA0_CURR_COUNT)118 #define bfin_read_MXVR_DMA1_COUNT() bfin_read16(MXVR_DMA1_COUNT)122 #define bfin_read_MXVR_DMA1_CURR_COUNT() bfin_read16(MXVR_DMA1_CURR_COUNT)[all …]
15 #define bfin_read_USB_FADDR() bfin_read16(USB_FADDR)17 #define bfin_read_USB_POWER() bfin_read16(USB_POWER)19 #define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX)21 #define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX)23 #define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE)25 #define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE)27 #define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB)29 #define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE)31 #define bfin_read_USB_FRAME() bfin_read16(USB_FRAME)33 #define bfin_read_USB_INDEX() bfin_read16(USB_INDEX)[all …]
11 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)12 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)15 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)17 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)24 #define bfin_read_SWRST() bfin_read16(SWRST)26 #define bfin_read_SYSCR() bfin_read16(SYSCR)73 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)84 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)86 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)[all …]
11 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)12 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)15 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)17 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)22 #define bfin_read_SWRST() bfin_read16(SWRST)24 #define bfin_read_SYSCR() bfin_read16(SYSCR)44 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)54 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)56 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)[all …]
12 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)13 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)15 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)16 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)18 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)22 #define bfin_read_SWRST() bfin_read16(SWRST)24 #define bfin_read_SYSCR() bfin_read16(SYSCR)60 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)68 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)70 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)[all …]
13 #define bfin_read_MXVR_CONFIG() bfin_read16(MXVR_CONFIG)29 #define bfin_read_MXVR_POSITION() bfin_read16(MXVR_POSITION)31 #define bfin_read_MXVR_MAX_POSITION() bfin_read16(MXVR_MAX_POSITION)33 #define bfin_read_MXVR_DELAY() bfin_read16(MXVR_DELAY)35 #define bfin_read_MXVR_MAX_DELAY() bfin_read16(MXVR_MAX_DELAY)39 #define bfin_read_MXVR_GADDR() bfin_read16(MXVR_GADDR)93 #define bfin_read_MXVR_DMA0_COUNT() bfin_read16(MXVR_DMA0_COUNT)97 #define bfin_read_MXVR_DMA0_CURR_COUNT() bfin_read16(MXVR_DMA0_CURR_COUNT)103 #define bfin_read_MXVR_DMA1_COUNT() bfin_read16(MXVR_DMA1_COUNT)107 #define bfin_read_MXVR_DMA1_CURR_COUNT() bfin_read16(MXVR_DMA1_CURR_COUNT)[all …]
15 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)16 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)18 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)19 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)21 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)26 #define bfin_read_SWRST() bfin_read16(SWRST)28 #define bfin_read_SYSCR() bfin_read16(SYSCR)30 #define bfin_read_SIC_RVECT() bfin_read16(SIC_RVECT)62 #define bfin_read_SICB_SWRST() bfin_read16(SICB_SWRST)64 #define bfin_read_SICB_SYSCR() bfin_read16(SICB_SYSCR)[all …]
15 #define bfin_read_RSI_PWR_CTL() bfin_read16(RSI_PWR_CONTROL)17 #define bfin_read_RSI_CLK_CTL() bfin_read16(RSI_CLK_CONTROL)21 #define bfin_read_RSI_COMMAND() bfin_read16(RSI_COMMAND)23 #define bfin_read_RSI_RESP_CMD() bfin_read16(RSI_RESP_CMD)35 #define bfin_read_RSI_DATA_LGTH() bfin_read16(RSI_DATA_LGTH)37 #define bfin_read_RSI_DATA_CTL() bfin_read16(RSI_DATA_CONTROL)39 #define bfin_read_RSI_DATA_CNT() bfin_read16(RSI_DATA_CNT)43 #define bfin_read_RSI_STATUS_CLR() bfin_read16(RSI_STATUSCL)49 #define bfin_read_RSI_FIFO_CNT() bfin_read16(RSI_FIFO_CNT)51 #define bfin_read_RSI_CEATA_CTL() bfin_read16(RSI_CEATA_CONTROL)[all …]
15 #define bfin_read_EMAC_PTP_CTL() bfin_read16(EMAC_PTP_CTL)17 #define bfin_read_EMAC_PTP_IE() bfin_read16(EMAC_PTP_IE)19 #define bfin_read_EMAC_PTP_ISTAT() bfin_read16(EMAC_PTP_ISTAT)47 #define bfin_read_EMAC_PTP_ID_OFF() bfin_read16(EMAC_PTP_ID_OFF)
11 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)12 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)14 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)17 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)19 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)22 #define bfin_read_SWRST() bfin_read16(SWRST)24 #define bfin_read_SYSCR() bfin_read16(SYSCR)42 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)52 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)54 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)[all …]
43 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)198 #define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)206 #define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)214 #define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)222 #define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)230 #define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)238 #define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)246 #define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)254 #define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)2426 #define bfin_read_CAN0_MC1() bfin_read16(CAN0_MC1)[all …]
16 { return bfin_read16(&iface->regs_base->reg); } \42 ret = bfin_read16(&iface->regs_base->rcv_data8); in DEFINE_TWI_REG()54 ret = bfin_read16(&iface->regs_base->rcv_data16);63 return bfin_read16(&iface->regs_base->fifo_ctl);74 return bfin_read16(&iface->regs_base->control); in read_CONTROL()
329 #define UART_GET_CHAR(p) bfin_read16(port_membase(p) + OFFSET_RBR)330 #define UART_GET_DLL(p) bfin_read16(port_membase(p) + OFFSET_DLL)331 #define UART_GET_DLH(p) bfin_read16(port_membase(p) + OFFSET_DLH)333 #define UART_GET_GCTL(p) bfin_read16(port_membase(p) + OFFSET_GCTL)334 #define UART_GET_LCR(p) bfin_read16(port_membase(p) + OFFSET_LCR)335 #define UART_GET_MCR(p) bfin_read16(port_membase(p) + OFFSET_MCR)336 #define UART_GET_MSR(p) bfin_read16(port_membase(p) + OFFSET_MSR)353 #define UART_GET_IER(p) bfin_read16(port_membase(p) + OFFSET_IER_SET)360 #define UART_GET_LSR(p) bfin_read16(port_membase(p) + OFFSET_LSR)375 #define UART_GET_IER(p) bfin_read16(port_membase(p) + OFFSET_IER)[all …]
16 #define __raw_readw bfin_read16
109 bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI) == 0x2796) in bfin_revid()
47 #define bfin_read16(addr) _bfin_readX(addr, 16, w, (z)) macro56 sizeof(*(addr)) == 2 ? bfin_read16(addr) : \
30 u16 mmr = bfin_read16(src); in probe_kernel_read()
119 bfin_read16(0); in init_clocks()
17 { return bfin_read16(port + off); } \