Home
last modified time | relevance | path

Searched refs:brg (Results 1 – 25 of 43) sorted by relevance

12

/arch/powerpc/boot/dts/
Dmpc866ads.dts105 brg-frequency = <0>;
120 brg@9f0 {
121 compatible = "fsl,mpc866-brg",
122 "fsl,cpm1-brg",
123 "fsl,cpm-brg";
147 fsl,cpm-brg = <1>;
158 fsl,cpm-brg = <2>;
Dep8248e.dts125 brg@119f0 {
126 compatible = "fsl,mpc8248-brg",
127 "fsl,cpm2-brg",
128 "fsl,cpm-brg";
140 fsl,cpm-brg = <7>;
153 fsl,cpm-brg = <1>;
Dtqm8xx.dts137 brg-frequency = <0>;
152 brg@9f0 {
153 compatible = "fsl,mpc860-brg",
154 "fsl,cpm1-brg",
155 "fsl,cpm-brg";
179 fsl,cpm-brg = <1>;
Dep88xc.dts158 brg@9f0 {
159 compatible = "fsl,mpc885-brg",
160 "fsl,cpm1-brg",
161 "fsl,cpm-brg";
183 fsl,cpm-brg = <1>;
196 fsl,cpm-brg = <2>;
Dadder875-uboot.dts147 brg@9f0 {
148 compatible = "fsl,mpc875-brg",
149 "fsl,cpm1-brg",
150 "fsl,cpm-brg";
172 fsl,cpm-brg = <1>;
Dadder875-redboot.dts148 brg@9f0 {
149 compatible = "fsl,mpc875-brg",
150 "fsl,cpm1-brg",
151 "fsl,cpm-brg";
173 fsl,cpm-brg = <1>;
Dmpc885ads.dts163 brg@9f0 {
164 compatible = "fsl,mpc885-brg",
165 "fsl,cpm1-brg",
166 "fsl,cpm-brg";
188 fsl,cpm-brg = <1>;
199 fsl,cpm-brg = <2>;
Dpq2fads.dts146 brg@119f0 {
147 compatible = "fsl,mpc8280-brg",
148 "fsl,cpm2-brg",
149 "fsl,cpm-brg";
160 fsl,cpm-brg = <1>;
171 fsl,cpm-brg = <2>;
Dmpc8272ads.dts147 brg@119f0 {
148 compatible = "fsl,mpc8272-brg",
149 "fsl,cpm2-brg",
150 "fsl,cpm-brg";
161 fsl,cpm-brg = <1>;
172 fsl,cpm-brg = <4>;
Dmgcoge.dts130 brg@119f0 {
131 compatible = "fsl,mpc8247-brg",
132 "fsl,cpm2-brg",
133 "fsl,cpm-brg";
145 fsl,cpm-brg = <2>;
Dstx_gp3_8560.dts232 brg@919f0 {
233 compatible = "fsl,mpc8560-brg",
234 "fsl,cpm2-brg",
235 "fsl,cpm-brg";
255 fsl,cpm-brg = <2>;
Dksi8560.dts232 brg@919f0 {
233 compatible = "fsl,mpc8560-brg",
234 "fsl,cpm2-brg",
235 "fsl,cpm-brg";
255 fsl,cpm-brg = <1>;
267 fsl,cpm-brg = <2>;
Dc2k.dts144 BRG0: brg@b200 {
145 compatible = "marvell,mv64360-brg";
152 BRG1: brg@b208 {
153 compatible = "marvell,mv64360-brg";
178 brg = <&BRG0>;
192 brg = <&BRG1>;
Dtqm8560.dts250 brg@919f0 {
251 compatible = "fsl,mpc8560-brg",
252 "fsl,cpm2-brg",
253 "fsl,cpm-brg";
273 fsl,cpm-brg = <1>;
285 fsl,cpm-brg = <2>;
Dtqm8541.dts279 brg@919f0 {
280 compatible = "fsl,mpc8541-brg",
281 "fsl,cpm2-brg",
282 "fsl,cpm-brg";
Dtqm8555.dts279 brg@919f0 {
280 compatible = "fsl,mpc8555-brg",
281 "fsl,cpm2-brg",
282 "fsl,cpm-brg";
Dstxssa8555.dts266 brg@919f0 {
267 compatible = "fsl,mpc8555-brg",
268 "fsl,cpm2-brg",
269 "fsl,cpm-brg";
/arch/powerpc/sysdev/
Dmv64x60_dev.c96 struct device_node *sdma, *brg; in mv64x60_mpsc_device_setup() local
124 brg = of_find_node_by_phandle(*ph); in mv64x60_mpsc_device_setup()
125 if (!brg) in mv64x60_mpsc_device_setup()
128 err = of_address_to_resource(brg, 0, &r[2]); in mv64x60_mpsc_device_setup()
129 of_node_put(brg); in mv64x60_mpsc_device_setup()
147 prop = of_get_property(brg, "current-speed", NULL); in mv64x60_mpsc_device_setup()
172 prop = of_get_property(brg, "bcr", NULL); in mv64x60_mpsc_device_setup()
178 prop = of_get_property(brg, "clock-src", NULL); in mv64x60_mpsc_device_setup()
182 prop = of_get_property(brg, "clock-frequency", NULL); in mv64x60_mpsc_device_setup()
Dcpm2.c119 void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src) in __cpm2_setbrg() argument
126 if (brg < 4) { in __cpm2_setbrg()
130 brg -= 4; in __cpm2_setbrg()
132 bp += brg; in __cpm2_setbrg()
/arch/m68k/68360/
Dcommproc.c290 m360_cpm_setbrg(uint brg, uint rate) in m360_cpm_setbrg() argument
298 bp += brg; in m360_cpm_setbrg()
/arch/powerpc/sysdev/qe_lib/
Dqe.c200 int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier) in qe_setbrg() argument
205 if ((brg < QE_BRG1) || (brg > QE_BRG16)) in qe_setbrg()
224 out_be32(&qe_immr->brg.brgc[brg - QE_BRG1], tempval); in qe_setbrg()
/arch/powerpc/boot/dts/fsl/
Dmpc8560ads.dts235 brg@919f0 {
236 compatible = "fsl,mpc8560-brg",
237 "fsl,cpm2-brg",
238 "fsl,cpm-brg";
258 fsl,cpm-brg = <1>;
270 fsl,cpm-brg = <2>;
Dmpc8555cds.dts267 brg@919f0 {
268 compatible = "fsl,mpc8555-brg",
269 "fsl,cpm2-brg",
270 "fsl,cpm-brg";
Dmpc8541cds.dts267 brg@919f0 {
268 compatible = "fsl,mpc8541-brg",
269 "fsl,cpm2-brg",
270 "fsl,cpm-brg";
/arch/powerpc/include/asm/
Dcpm2.h109 extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src);
114 static inline void cpm_setbrg(uint brg, uint rate) in cpm_setbrg() argument
116 __cpm2_setbrg(brg, rate, CPM2_BRG_UART_CLK, 0, CPM_BRG_EXTC_INT); in cpm_setbrg()
122 static inline void cpm2_fastbrg(uint brg, uint rate, int div16) in cpm2_fastbrg() argument
124 __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT); in cpm2_fastbrg()

12