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Searched refs:c0_CSSELR (Results 1 – 4 of 4) sorted by relevance

/arch/arm/include/asm/
Dkvm_asm.h24 #define c0_CSSELR 2 /* Cache Size Selection Register */ macro
/arch/arm64/include/asm/
Dkvm_asm.h60 #define c0_CSSELR (CSSELR_EL1 * 2)/* Cache Size Selection Register */ macro
/arch/arm/kvm/
Dinterrupts_head.S274 str r12, [vcpu, #CP15_OFFSET(c0_CSSELR)]
385 ldr r12, [vcpu, #CP15_OFFSET(c0_CSSELR)]
Dcoproc.c276 NULL, reset_unknown, c0_CSSELR },