Searched refs:c5_DFSR (Results 1 – 7 of 7) sorted by relevance
| /arch/arm/include/asm/ |
| D | kvm_asm.h | 34 #define c5_DFSR 12 /* Data Fault Status Register */ macro
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| /arch/arm64/include/asm/ |
| D | kvm_asm.h | 70 #define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */ macro
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| /arch/arm/kvm/ |
| D | emulate.c | 371 vcpu->arch.cp15[c5_DFSR] = 1 << 9 | 0x22; in inject_abt()
373 vcpu->arch.cp15[c5_DFSR] = 2; in inject_abt()
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| D | interrupts_head.S | 296 str r6, [vcpu, #CP15_OFFSET(c5_DFSR)]
351 ldr r6, [vcpu, #CP15_OFFSET(c5_DFSR)]
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| D | coproc.c | 303 access_vm_reg, reset_unknown, c5_DFSR },
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| /arch/arm64/kvm/ |
| D | inject_fault.c | 85 fsr = &vcpu_cp15(vcpu, c5_DFSR); in inject_abt32()
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| D | sys_regs.c | 872 { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR },
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