Searched refs:clk_pll1 (Results 1 – 1 of 1) sorted by relevance
74 static struct clk clk_pll1 = { variable78 .parent = &clk_pll1,81 .parent = &clk_pll1,84 .parent = &clk_pll1,210 INIT_CK(NULL, "pll1", &clk_pll1),362 max_rate = max3(clk_pll1.rate / 4, clk_pll2.rate / 4, clk_xtali.rate / 4); in calc_clk_div()378 mclk = &clk_pll1; in calc_clk_div()524 clk_pll1.rate = clk_xtali.rate; in ep93xx_clock_init()526 clk_pll1.rate = calc_pll_rate(value); in ep93xx_clock_init()529 clk_f.rate = clk_pll1.rate / fclk_divisors[(value >> 25) & 0x7]; in ep93xx_clock_init()[all …]