/arch/sparc/lib/ |
D | ffs.S | 12 clr %o0 19 clr %o1 /* 2 */ 23 1: clr %o2 29 clr %o3 32 clr %o4 38 clr %o5
|
D | bitops.S | 26 clr %o0 47 clr %o0 68 clr %o0
|
D | ashldi3.S | 22 clr %o5
|
D | strncmp_64.S | 29 clr %o0
|
D | lshrdi3.S | 13 clr %o4
|
D | GENbzero.S | 34 clr %o2 121 clr %o3 124 clr %o2
|
D | copy_in_user.S | 95 clr %o0 106 clr %o0
|
/arch/arm/mach-rpc/ |
D | irq.c | 120 unsigned int irq, clr, set; in rpc_init_irq() local 131 clr = IRQ_NOREQUEST; in rpc_init_irq() 135 clr |= IRQ_NOPROBE; in rpc_init_irq() 145 irq_modify_status(irq, clr, set); in rpc_init_irq() 151 irq_modify_status(irq, clr, set); in rpc_init_irq() 157 irq_modify_status(irq, clr, set); in rpc_init_irq() 162 irq_modify_status(irq, clr, set); in rpc_init_irq()
|
/arch/mn10300/kernel/ |
D | gdb-low.S | 37 clr d0 define 49 clr d0 define 61 clr d0 define 80 clr d0 define 91 clr d0 define 102 clr d0 define
|
D | mn10300-watchdog-low.S | 56 clr d0 define 57 clr d1 define
|
/arch/powerpc/include/asm/ |
D | pgtable-ppc32.h | 167 unsigned long clr, in pte_update() argument 181 : "r" (p), "r" (clr), "r" (set), "m" (*p) in pte_update() 185 *p = __pte((old & ~clr) | set); in pte_update() 196 unsigned long clr, in pte_update() argument 212 : "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p) in pte_update() 216 *p = __pte((old & ~(unsigned long long)clr) | set); in pte_update() 271 unsigned long clr = ~pte_val(entry) & _PAGE_RO; in __ptep_set_access_flags() local 273 pte_update(ptep, clr, set); in __ptep_set_access_flags()
|
D | dcr-native.h | 123 unsigned clr, unsigned set) in __dcri_clrset() argument 131 val = (mfdcrx(base_data) & ~clr) | set; in __dcri_clrset() 135 val = (__mfdcr(base_data) & ~clr) | set; in __dcri_clrset() 149 #define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \ argument 151 reg, clr, set)
|
/arch/m68k/math-emu/ |
D | fp_util.S | 70 2: clr.l %d0 99 clr.l %d1 | sign defaults to zero 109 clr.l (%a0) 116 clr.l (%a0)+ 117 clr.l (%a0)+ 118 clr.l (%a0) 142 clr.l (%a0) | low lword = 0
|
/arch/m68k/ifpsp060/src/ |
D | itest.S | 81 clr.l TESTCTR(%a6) 91 clr.l TESTCTR(%a6) 101 clr.l TESTCTR(%a6) 111 clr.l TESTCTR(%a6) 121 clr.l TESTCTR(%a6) 132 clr.l TESTCTR(%a6) 142 clr.l TESTCTR(%a6) 169 clr.l %d1 181 clr.l IREGS+0x8(%a6) 182 clr.l IREGS+0xc(%a6) [all …]
|
D | ilsp.S | 298 clr.l %d1 313 clr.w %d5 327 clr.l DDNORMAL(%a6) # count of shifts for normalization 328 clr.b DDSECOND(%a6) # clear flag for quotient digits 329 clr.l %d1 # %d1 will hold trial quotient 362 clr.w %d6 # word u3 left 405 clr.l %d2 408 clr.w %d3 # %d3 now ls word of divisor 412 clr.w %d3 # %d3 now ms word of divisor 421 clr.l %d1 [all …]
|
/arch/m68k/ifpsp060/ |
D | os.S | 94 clr.l %d1 | return success 101 clr.l %d1 | return success 127 clr.l %d1 | return success 134 clr.l %d1 | return success 151 clr.l %d0 | clear whole longword 152 clr.l %d1 | assume success 187 clr.l %d1 | assume success 188 clr.l %d0 | clear whole longword 223 clr.l %d1 | assume success 245 clr.l %d1 | assume success [all …]
|
/arch/mips/include/asm/mach-ralink/ |
D | ralink_regs.h | 46 static inline void rt_sysc_m32(u32 clr, u32 set, unsigned reg) in rt_sysc_m32() argument 48 u32 val = rt_sysc_r32(reg) & ~clr; in rt_sysc_m32()
|
/arch/mips/kernel/ |
D | head.S | 36 .macro setup_c0_status set clr argument 39 or t0, ST0_CU0|\set|0x1f|\clr 40 xor t0, 0x1f|\clr
|
/arch/sparc/include/asm/ |
D | ns87303.h | 87 unsigned char clr, unsigned char set) in ns87303_modify() argument 105 value &= ~(reserved[index] | clr); in ns87303_modify()
|
D | ttable.h | 17 clr %o0; clr %o1; clr %o2; clr %o3; \ 18 clr %o4; clr %o5; clr %o6; clr %o7; \ 19 clr %l0; clr %l1; clr %l2; clr %l3; \ 20 clr %l4; clr %l5; clr %l6; clr %l7; \
|
D | asmmacro.h | 21 #define RESTORE_ALL b ret_trap_entry; clr %l6;
|
/arch/arm/mach-s3c24xx/include/mach/ |
D | hardware.h | 17 extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg);
|
/arch/cris/arch-v10/kernel/ |
D | time.c | 149 IO_STATE( R_TIMER_CTRL, i1, clr) | in timer_interrupt() 152 IO_STATE( R_TIMER_CTRL, i0, clr) | in timer_interrupt() 156 *R_TIMER_CTRL = r_timer_ctrl_shadow | IO_STATE(R_TIMER_CTRL, i0, clr); in timer_interrupt()
|
/arch/mips/include/asm/octeon/ |
D | cvmx-gpio-defs.h | 371 uint64_t clr:24; member 373 uint64_t clr:24; 382 uint64_t clr:16; member 384 uint64_t clr:16; 399 uint64_t clr:20; member 401 uint64_t clr:20;
|
/arch/alpha/lib/ |
D | clear_user.S | 62 clr $0 # .. e1 : 94 clr $0 # .. e1 :
|