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Searched refs:cm_inst (Results 1 – 10 of 10) sorted by relevance

/arch/arm/mach-omap2/
Dclockdomains33xx_data.c28 .cm_inst = AM33XX_CM_PER_MOD,
36 .cm_inst = AM33XX_CM_PER_MOD,
44 .cm_inst = AM33XX_CM_PER_MOD,
52 .cm_inst = AM33XX_CM_PER_MOD,
60 .cm_inst = AM33XX_CM_PER_MOD,
68 .cm_inst = AM33XX_CM_PER_MOD,
76 .cm_inst = AM33XX_CM_PER_MOD,
84 .cm_inst = AM33XX_CM_PER_MOD,
92 .cm_inst = AM33XX_CM_PER_MOD,
100 .cm_inst = AM33XX_CM_PER_MOD,
[all …]
Dclockdomains43xx_data.c22 .cm_inst = AM43XX_CM_CEFUSE_INST,
31 .cm_inst = AM43XX_CM_MPU_INST,
40 .cm_inst = AM43XX_CM_PER_INST,
49 .cm_inst = AM43XX_CM_TAMPER_INST,
58 .cm_inst = AM43XX_CM_RTC_INST,
67 .cm_inst = AM43XX_CM_PER_INST,
76 .cm_inst = AM43XX_CM_PER_INST,
85 .cm_inst = AM43XX_CM_WKUP_INST,
94 .cm_inst = AM43XX_CM_PER_INST,
103 .cm_inst = AM43XX_CM_WKUP_INST,
[all …]
Dclockdomains81xx_data.c41 .cm_inst = TI81XX_CM_ALWON_MOD,
49 .cm_inst = TI81XX_CM_ALWON_MOD,
57 .cm_inst = TI81XX_CM_ALWON_MOD,
65 .cm_inst = TI81XX_CM_ALWON_MOD,
73 .cm_inst = TI81XX_CM_ALWON_MOD,
81 .cm_inst = TI81XX_CM_ALWON_MOD,
91 .cm_inst = TI81XX_CM_ALWON_MOD,
99 .cm_inst = TI816X_CM_ACTIVE_MOD,
107 .cm_inst = TI816X_CM_IVAHD0_MOD,
115 .cm_inst = TI816X_CM_IVAHD1_MOD,
[all …]
Dclockdomains54xx_data.c171 .cm_inst = OMAP54XX_CM_CORE_CORE_INST,
183 .cm_inst = OMAP54XX_CM_CORE_IVA_INST,
195 .cm_inst = OMAP54XX_CM_CORE_CORE_INST,
206 .cm_inst = OMAP54XX_CM_CORE_CORE_INST,
216 .cm_inst = OMAP54XX_CM_CORE_CORE_INST,
226 .cm_inst = OMAP54XX_CM_CORE_CUSTEFUSE_INST,
235 .cm_inst = OMAP54XX_CM_CORE_CORE_INST,
247 .cm_inst = OMAP54XX_CM_CORE_CORE_INST,
257 .cm_inst = OMAP54XX_CM_CORE_AON_ABE_INST,
267 .cm_inst = OMAP54XX_CM_CORE_DSS_INST,
[all …]
Dclockdomains44xx_data.c160 .cm_inst = OMAP4430_CM2_CEFUSE_INST,
169 .cm_inst = OMAP4430_CM2_CORE_INST,
179 .cm_inst = OMAP4430_CM1_TESLA_INST,
191 .cm_inst = OMAP4430_CM2_GFX_INST,
203 .cm_inst = OMAP4430_CM2_IVAHD_INST,
215 .cm_inst = OMAP4430_CM2_L4PER_INST,
227 .cm_inst = OMAP4430_CM2_L4PER_INST,
237 .cm_inst = OMAP4430_CM1_ABE_INST,
247 .cm_inst = OMAP4430_CM2_CORE_INST,
255 .cm_inst = OMAP4430_CM2_L3INIT_INST,
[all …]
Dclockdomains7xx_data.c319 .cm_inst = DRA7XX_CM_CORE_L4PER_INST,
329 .cm_inst = DRA7XX_CM_CORE_L4PER_INST,
341 .cm_inst = DRA7XX_MPU_PRCM_CM_C0_INST,
350 .cm_inst = DRA7XX_CM_CORE_IVA_INST,
362 .cm_inst = DRA7XX_CM_CORE_COREAON_INST,
371 .cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,
383 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
395 .cm_inst = DRA7XX_CM_CORE_L3INIT_INST,
407 .cm_inst = DRA7XX_CM_CORE_L4PER_INST,
419 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
[all …]
Dcminst44xx.c363 clkdm1->cm_inst, clkdm1->clkdm_offs + in omap4_clkdm_add_wkup_sleep_dep()
373 clkdm1->cm_inst, clkdm1->clkdm_offs + in omap4_clkdm_del_wkup_sleep_dep()
382 clkdm1->cm_inst, in omap4_clkdm_read_wkup_sleep_dep()
405 clkdm->cm_inst, clkdm->clkdm_offs + in omap4_clkdm_clear_all_wkup_sleep_deps()
414 clkdm->cm_inst, in omap4_clkdm_sleep()
418 clkdm->cm_inst, in omap4_clkdm_sleep()
429 clkdm->cm_inst, clkdm->clkdm_offs); in omap4_clkdm_wakeup()
436 clkdm->cm_inst, clkdm->clkdm_offs); in omap4_clkdm_allow_idle()
445 clkdm->cm_inst, in omap4_clkdm_deny_idle()
476 clkdm->cm_inst, clkdm->clkdm_offs); in omap4_clkdm_clk_disable()
Dcm33xx.c299 am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); in am33xx_clkdm_sleep()
305 am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); in am33xx_clkdm_wakeup()
311 am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); in am33xx_clkdm_allow_idle()
316 am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); in am33xx_clkdm_deny_idle()
331 hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); in am33xx_clkdm_clk_disable()
Dclockdomain.h136 const u16 cm_inst; member
Domap_hwmod.c1009 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs); in _omap4_enable_module()
1033 oh->clkdm->cm_inst, in _omap4_wait_target_disable()
1838 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst, in _omap4_disable_module()
2956 oh->clkdm->cm_inst, in _omap4_wait_target_ready()