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Searched refs:cmask (Results 1 – 9 of 9) sorted by relevance

/arch/x86/kernel/cpu/
Dperf_event.h61 u64 cmask; member
255 .cmask = (m), \
485 cmask:8, member
Dperf_event_p6.c188 PMU_FORMAT_ATTR(cmask, "config:24-31" );
Dperf_event_intel.c2112 if ((event->hw.config & c->cmask) == c->code) { in x86_get_event_constraints()
2465 u64 alt_config = X86_CONFIG(.event=0xc0, .inv=1, .cmask=16); in intel_pebs_aliases_core2()
2493 u64 alt_config = X86_CONFIG(.event=0xc2, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_snb()
2731 PMU_FORMAT_ATTR(cmask, "config:24-31" );
3335 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
3338 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
3398 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
3401 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
3435 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
3438 X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
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Dperf_event_intel_uncore_snb.c70 DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28");
71 DEFINE_UNCORE_FORMAT_ATTR(cmask8, cmask, "config:24-31");
Dperf_event_knc.c278 PMU_FORMAT_ATTR(cmask, "config:24-31" );
Dperf_event_amd.c456 PMU_FORMAT_ATTR(cmask, "config:24-31" );
Dperf_event.c1656 u64 cmask = (config & ARCH_PERFMON_EVENTSEL_CMASK) >> 24; in x86_event_sysfs_show() local
1684 if (cmask) in x86_event_sysfs_show()
1685 ret += sprintf(page + ret, ",cmask=0x%02llx", cmask); in x86_event_sysfs_show()
Dperf_event_intel_ds.c792 if ((event->hw.config & c->cmask) == c->code) { in intel_pebs_constraints()
Dperf_event_intel_uncore.c397 if ((event->hw.config & c->cmask) == c->code) in uncore_get_event_constraint()